diff -urN linux-2.6.35.3.fsl/arch/arm/configs/vmx53_defconfig linux-2.6.35.3.work/arch/arm/configs/vmx53_defconfig --- linux-2.6.35.3.fsl/arch/arm/configs/vmx53_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.35.3.work/arch/arm/configs/vmx53_defconfig 2015-11-22 16:44:14.963616903 +0100 @@ -0,0 +1,2829 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.35.3 +# Thu Dec 13 16:02:33 2012 +# +CONFIG_ARM=y +CONFIG_HAVE_PWM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +# CONFIG_ARCH_USES_GETTIMEOFFSET is not set +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="-vmx53-vpac3" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +# CONFIG_KERNEL_GZIP is not set +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +CONFIG_KERNEL_LZO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +# CONFIG_CPUSETS is not set +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_MEM_RES_CTLR=y +CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_BLK_CGROUP=y +CONFIG_DEBUG_BLK_CGROUP=y +CONFIG_MM_OWNER=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_LZO is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_ASHMEM=y +CONFIG_AIO=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +# CONFIG_PERF_EVENTS is not set +# CONFIG_PERF_COUNTERS is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CNS3XXX is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_MXS is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_NUC93X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_SHMOBILE is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P6440 is not set +# CONFIG_ARCH_S5P6442 is not set +# CONFIG_ARCH_S5PC100 is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_PLAT_SPEAR is not set + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX25 is not set +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MX37 is not set +# CONFIG_ARCH_MXC91231 is not set +CONFIG_ARCH_MX5=y +CONFIG_MXC_SDMA_API=y +CONFIG_SDMA_IRAM=y +CONFIG_ARCH_MX53=y +CONFIG_FORCE_MAX_ZONEORDER=13 +# CONFIG_MACH_MX51_3DS is not set +# CONFIG_MACH_MX51_BABBAGE is not set +# CONFIG_MACH_MX53_EVK is not set +# CONFIG_MACH_MX53_ARD is not set +CONFIG_MACH_MX53_SMD=y +CONFIG_MACH_VMX53=y +# CONFIG_MACH_MX53_LOCO is not set +# CONFIG_MACH_MX50_ARM2 is not set +# CONFIG_MACH_MX50_RDP is not set + +# +# MX5x Options: +# +CONFIG_ARCH_MXC_HAS_NFC_V3=y +CONFIG_ARCH_MXC_HAS_NFC_V3_2=y +CONFIG_MXC_BLUETOOTH_RFKILL=y +CONFIG_IRAM_ALLOC=y +CONFIG_DMA_ZONE_SIZE=96 +CONFIG_ISP1504_MXC=y +CONFIG_UTMI_MXC=y +# CONFIG_MXC_IRQ_PRIOR is not set +CONFIG_MXC_TZIC=y +CONFIG_MXC_PWM=y +# CONFIG_MXC_DEBUG_BOARD is not set +CONFIG_ARCH_MXC_IOMUX_V3=y +CONFIG_MXC_DVFS_PER=y + +# +# Processor Type +# +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_CPU_HAS_PMU=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_VMSPLIT_3G is not set +CONFIG_VMSPLIT_2G=y +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0x80000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_IMX=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_NVS=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HAS_WAKELOCK=y +CONFIG_HAS_EARLYSUSPEND=y +CONFIG_WAKELOCK=y +CONFIG_WAKELOCK_STAT=y +CONFIG_USER_WAKELOCK=y +CONFIG_EARLYSUSPEND=y +# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set +# CONFIG_CONSOLE_EARLYSUSPEND is not set +CONFIG_FB_EARLYSUSPEND=y +CONFIG_APM_EMULATION=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_OPS=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_MIGRATE=y +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +CONFIG_NET_IPIP=y +CONFIG_NET_IPGRE=y +# CONFIG_NET_IPGRE_BROADCAST is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +CONFIG_INET_XFRM_TUNNEL=y +CONFIG_INET_TUNNEL=y +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETLABEL is not set +CONFIG_ANDROID_PARANOID_NETWORK=y +CONFIG_NET_ACTIVITY_STATS=y +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_CT_ACCT is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +CONFIG_NF_CT_PROTO_GRE=y +# CONFIG_NF_CT_PROTO_SCTP is not set +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +# CONFIG_NF_CONNTRACK_SANE is not set +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_STATE=y +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_ADDRTYPE is not set +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_LOG is not set +# CONFIG_IP_NF_TARGET_ULOG is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +# CONFIG_NF_NAT_SNMP_BASIC is not set +CONFIG_NF_NAT_PROTO_GRE=y +CONFIG_NF_NAT_PROTO_UDPLITE=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_IRC=y +CONFIG_NF_NAT_TFTP=y +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_PPTP=y +CONFIG_NF_NAT_H323=y +CONFIG_NF_NAT_SIP=y +# CONFIG_IP_NF_MANGLE is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_CONNTRACK_IPV6 is not set +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_L2TP=y +# CONFIG_L2TP_DEBUGFS is not set +# CONFIG_L2TP_V3 is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y + +# +# CAN Device Drivers +# +CONFIG_CAN_VCAN=y +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +CONFIG_CAN_MCP251X=y +# CONFIG_CAN_SJA1000 is not set + +# +# CAN USB interfaces +# +# CONFIG_CAN_EMS_USB is not set +CONFIG_CAN_DEBUG_DEVICES=y +CONFIG_CAN_FLEXCAN=y +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +# CONFIG_BT_L2CAP_EXT_FEATURES is not set +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_BCSP is not set +CONFIG_BT_HCIUART_ATH3K=y +# CONFIG_BT_HCIUART_LL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +CONFIG_BT_HCIVHCI=y +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# + +# +# Some wireless drivers require a rate control algorithm +# +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +# CONFIG_DEVTMPFS_MOUNT is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_MXC is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MXC_DATAFLASH is not set +# CONFIG_MTD_MXC_M25P80 is not set +CONFIG_MTD_M25P80=y +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_SM_COMMON is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018 +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +CONFIG_MTD_NAND_MXC_V3=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +CONFIG_MTD_NAND_MXC_FORCE_CE=y +CONFIG_MXC_NAND_LOW_LEVEL_ERASE=y +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_GLUEBI is not set + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +# CONFIG_AD525X_DPOT is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +CONFIG_ANDROID_PMEM=y +CONFIG_UID_STAT=y +CONFIG_IFACE_STAT=y +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_IWMC3200TOP is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=y +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=y +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +CONFIG_FEC=y +# CONFIG_FEC_1588 is not set +# CONFIG_FEC2 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +CONFIG_WLAN=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_HOSTAP is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_WAN is not set +CONFIG_PPP=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOE=y +CONFIG_PPPOL2TP=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +# CONFIG_SLIP is not set +CONFIG_SLHC=y +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_APMPOWER is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_IMX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_MXC=y +CONFIG_KEYBOARD_MPR121=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +CONFIG_TOUCHSCREEN_EGALAX=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_MXC=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +CONFIG_TOUCHSCREEN_P1003=y +# CONFIG_TOUCHSCREEN_DA9052 is not set +CONFIG_TOUCHSCREEN_MAX11801=y +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +CONFIG_INPUT_DA9052_ONKEY=y +CONFIG_INPUT_ISL29023=y + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +CONFIG_MXC_IIM=y +CONFIG_MXS_VIIM=y +CONFIG_IMX_SIM=m + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_RAMOOPS is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_DESIGNWARE is not set +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_IMX=y +# CONFIG_I2C_MXC is not set +CONFIG_I2C_MXC_HS=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_IMX_VER_0_7=y +CONFIG_SPI_IMX_VER_2_3=y +CONFIG_SPI_IMX=y +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_MXC is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO expanders: +# +# CONFIG_GPIO_IT8761E is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +# CONFIG_GPIO_PCA953X_IRQ is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# AC97 GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# +# CONFIG_DA9052_GPIO_ENABLE is not set +CONFIG_W1=y +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +CONFIG_W1_MASTER_MXC=y +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +CONFIG_W1_SLAVE_SMEM=y +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2751 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +CONFIG_W1_SLAVE_DS2438=m +# CONFIG_W1_SLAVE_DS2760 is not set +# CONFIG_W1_SLAVE_BQ27000 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +CONFIG_APM_POWER=y +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_DA9052 is not set +CONFIG_BATTERY_MAX17085=y +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_BATTERY_DS2438=m +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +CONFIG_SENSORS_DA9052=y +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX1619 is not set +CONFIG_SENSORS_MAX17135=y +# CONFIG_SENSORS_MAX6650 is not set +CONFIG_SENSORS_MMA845X=y +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +CONFIG_SENSORS_MAG3110=y +CONFIG_MXC_MMA8450=y +# CONFIG_MXC_MMA8451 is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_DA9052_WATCHDOG is not set +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_IMX2_WDT is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_SWITCH=y +# CONFIG_SWITCH_GPIO is not set +CONFIG_MFD_SUPPORT=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TC35892 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_LTC3589=y +CONFIG_MFD_LTC3589_I2C=y +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_MC13783 is not set +CONFIG_PMIC_DA9052=y +# CONFIG_ABX500_CORE is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_AB8500_CORE is not set +CONFIG_MFD_MAX17135=y +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_DUMMY is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_MC34708=y +CONFIG_REGULATOR_LTC3589=y +CONFIG_REGULATOR_MAX17135=y +CONFIG_REGULATOR_DA9052=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +CONFIG_IR_CORE=y +CONFIG_VIDEO_IR=y +CONFIG_RC_MAP=y +CONFIG_IR_NEC_DECODER=y +CONFIG_IR_RC5_DECODER=y +CONFIG_IR_RC6_DECODER=y +CONFIG_IR_JVC_DECODER=y +CONFIG_IR_SONY_DECODER=y +# CONFIG_IR_IMON is not set +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +CONFIG_MEDIA_TUNER_CUSTOMISE=y +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set +CONFIG_VIDEO_IR_I2C=y + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_AK881X is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=y + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_IPU_CAMERA=y +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set +# CONFIG_MXC_CAMERA_MC521DA is not set +# CONFIG_MXC_EMMA_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640_EMMA is not set +# CONFIG_MXC_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640 is not set +# CONFIG_MXC_CAMERA_OV3640 is not set +# CONFIG_MXC_CAMERA_OV5640 is not set +CONFIG_MXC_CAMERA_OV5642=y +# CONFIG_MXC_TVIN_ADV7180 is not set +CONFIG_MXC_IPU_PRP_VF_SDC=y +CONFIG_MXC_IPU_PRP_ENC=y +CONFIG_MXC_IPU_CSI_ENC=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_PXP_V4L2 is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_VIDEO_BUFFERS_DMA=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_I2C_SI4713 is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +CONFIG_RADIO_SI4705=y +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_TVOUT_TVE is not set +# CONFIG_FB_MXC_LDB is not set +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_SII902X is not set +# CONFIG_FB_MXC_CH7026 is not set +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_MXC_EINK_PANEL is not set +# CONFIG_FB_MXC_ELCDIF_FB is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_TMIO is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +# CONFIG_BACKLIGHT_DA9052 is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_ADP8860 is not set +CONFIG_BACKLIGHT_MXC_MC13892=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_MXC_SOC=y +CONFIG_SND_MXC_SOC_SSI=y +CONFIG_SND_MXC_SOC_SPDIF_DAI=y +CONFIG_SND_MXC_SOC_IRAM=y +CONFIG_SND_SOC_IMX_3STACK_SGTL5000=y +# CONFIG_SND_SOC_IMX_3STACK_AK4647 is not set +# CONFIG_SND_SOC_IMX_3STACK_WM8580 is not set +# CONFIG_SND_SOC_IMX_3STACK_AK5702 is not set +# CONFIG_SND_SOC_IMX_3STACK_BLUETOOTH is not set +# CONFIG_SND_SOC_IMX_3STACK_CS42888 is not set +CONFIG_SND_SOC_IMX_SPDIF=y +# CONFIG_MXC_SSI_DUAL_FIFO is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_SGTL5000=y +CONFIG_SND_SOC_MXC_SPDIF=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +# CONFIG_HID_3M_PCT is not set +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +# CONFIG_HID_CANDO is not set +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +# CONFIG_HID_PRODIKEYS is not set +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EGALAX is not set +CONFIG_HID_EZKEY=m +# CONFIG_HID_KYE is not set +CONFIG_HID_GYRATION=m +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +CONFIG_HID_MICROSOFT=m +# CONFIG_HID_MOSART is not set +CONFIG_HID_MONTEREY=m +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_QUANTA is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_ROCCAT_KONE is not set +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +# CONFIG_HID_STANTUM is not set +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ARC=y +# CONFIG_USB_EHCI_ARC_OTG is not set +# CONFIG_USB_STATIC_IRAM is not set +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_EHCI_MXC is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_EZUSB is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_ZIO is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=y +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +CONFIG_USB_FILE_STORAGE=m +# CONFIG_FSL_UTP is not set +# CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_MASS_STORAGE is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_NOKIA is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_WEBCAM is not set +CONFIG_USB_ANDROID=y +CONFIG_USB_ANDROID_ADB=y +CONFIG_USB_ANDROID_MASS_STORAGE=y +CONFIG_USB_ANDROID_RNDIS=y +CONFIG_USB_ANDROID_RNDIS_WCEIS=y + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ULPI is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_MXC_OTG is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_MXC is not set +CONFIG_MMC_IMX_ESDHCI=y +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_MC13892=y +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_GPIO_PLATFORM=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_DA9052 is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +CONFIG_LEDS_TRIGGERS=y + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_INTF_ALARM=y +CONFIG_RTC_INTF_ALARM_DEV=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_DS1307=y +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DA9052 is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_MXC is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_MXC_V2=y +# CONFIG_RTC_DRV_IMXDI is not set +CONFIG_RTC_MC13892=y +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_MXC_PXP=y +CONFIG_MXC_PXP_CLIENT_DEVICE=y +# CONFIG_TIMB_DMA is not set +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_VIDEO_TM6000 is not set +# CONFIG_USB_IP_COMMON is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_RT2870 is not set +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_TRANZPORT is not set +# CONFIG_POHMELFS is not set +# CONFIG_LINE6_USB is not set +# CONFIG_USB_SERIAL_QUATECH2 is not set +# CONFIG_USB_SERIAL_QUATECH_USB2 is not set +# CONFIG_VT6656 is not set +# CONFIG_FB_UDL is not set + +# +# RAR Register Driver +# +# CONFIG_IIO is not set +# CONFIG_RAMZSWAP is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_FB_SM7XX is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_ST_BT is not set +# CONFIG_ADIS16255 is not set +CONFIG_ATH6K_LEGACY=m +CONFIG_AR600x_SD31_XXX=y +# CONFIG_AR600x_WB31_XXX is not set +# CONFIG_AR600x_SD32_XXX is not set +# CONFIG_AR600x_CUSTOM_XXX is not set +# CONFIG_ATH6KL_ENABLE_COEXISTENCE is not set +# CONFIG_ATH6KL_HCI_BRIDGE is not set +# CONFIG_ATH6KL_CFG80211 is not set +# CONFIG_ATH6KL_HTC_RAW_INTERFACE is not set +# CONFIG_ATH6KL_VIRTUAL_SCATTER_GATHER is not set +# CONFIG_ATH6KL_SKIP_ABI_VERSION_CHECK is not set +# CONFIG_ATH6KL_DEBUG is not set + +# +# Android +# +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3=y + +# +# MXC SSI support +# +# CONFIG_MXC_SSI is not set + +# +# MXC Digital Audio Multiplexer support +# +# CONFIG_MXC_DAM is not set + +# +# MXC PMIC support +# +CONFIG_MXC_PMIC=y +# CONFIG_MXC_PMIC_MC13783 is not set +CONFIG_MXC_PMIC_MC13892=y +CONFIG_MXC_PMIC_MC34708=y +CONFIG_MXC_PMIC_I2C=y +CONFIG_MXC_PMIC_SPI=y +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +# CONFIG_MXC_PMIC_CHARDEV is not set + +# +# MXC PMIC Client Drivers +# +CONFIG_MXC_MC13892_ADC=y +CONFIG_MXC_MC13892_RTC=y +CONFIG_MXC_MC13892_LIGHT=y +CONFIG_MXC_MC13892_BATTERY=m +CONFIG_MXC_MC13892_CONNECTIVITY=y +CONFIG_MXC_MC13892_POWER=y +CONFIG_MXC_MC34708_ADC=y +CONFIG_MXC_MC34708_RTC=y +CONFIG_MXC_MC34708_BATTERY=m +# CONFIG_MXC_MC34708_PWM is not set +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +# CONFIG_MXC_SECURITY_SCC is not set +# CONFIG_MXC_SECURITY_SCC2 is not set +# CONFIG_MXC_SECURITY_RNG is not set + +# +# SAHARA2 Security Hardware Support +# +# CONFIG_MXC_SAHARA is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +# CONFIG_MXC_HWEVENT is not set + +# +# MXC VPU(Video Processing Unit) support +# +CONFIG_MXC_VPU=y +# CONFIG_MXC_VPU_DEBUG is not set + +# +# MXC Asynchronous Sample Rate Converter support +# +CONFIG_MXC_ASRC=y + +# +# MXC Bluetooth support +# + +# +# Broadcom GPS ioctrl support +# + +# +# MXC Media Local Bus Driver +# +CONFIG_MXC_MLB=m + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# MXC GPU support +# +CONFIG_MXC_AMD_GPU=y + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT23=y +CONFIG_EXT4_FS_XATTR=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_XATTR is not set +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_DEBUG is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_HIGHMEM is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_LKDTM is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARM_UNWIND=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set +# CONFIG_OC_ETM is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +CONFIG_SECURITY=y +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_IMA is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MANAGER_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CRYPTODEV=y + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=y + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y diff -urN linux-2.6.35.3.fsl/arch/arm/mach-mx5/clock.c linux-2.6.35.3.work/arch/arm/mach-mx5/clock.c --- linux-2.6.35.3.fsl/arch/arm/mach-mx5/clock.c 2015-11-23 20:06:25.523833714 +0100 +++ linux-2.6.35.3.work/arch/arm/mach-mx5/clock.c 2015-11-22 16:44:14.963616903 +0100 @@ -240,6 +240,22 @@ return external_high_reference; } +static int high_reference_clock_rate_enable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg |= MXC_CCM_CCR_CAMP1_EN; + __raw_writel(reg, MXC_CCM_CCR); + + return 0; +} + +static void high_reference_clock_rate_disable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg &= ~MXC_CCM_CCR_CAMP1_EN; + __raw_writel(reg, MXC_CCM_CCR); +} + static unsigned long get_low_reference_clock_rate(struct clk *clk) { return external_low_reference; @@ -255,13 +271,37 @@ return ckih2_reference; } +static int ckih2_reference_clock_rate_enable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg |= MXC_CCM_CCR_CAMP2_EN; + __raw_writel(reg, MXC_CCM_CCR); + + return 0; +} + +static void ckih2_reference_clock_rate_disable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg &= ~MXC_CCM_CCR_CAMP2_EN; + __raw_writel(reg, MXC_CCM_CCR); +} + +static struct clk dummy_clk = { + .id = 0, +}; + /* External high frequency clock */ static struct clk ckih_clk = { .get_rate = get_high_reference_clock_rate, + .enable = high_reference_clock_rate_enable, + .disable = high_reference_clock_rate_disable, }; static struct clk ckih2_clk = { .get_rate = get_ckih2_reference_clock_rate, + .enable = ckih2_reference_clock_rate_enable, + .disable = ckih2_reference_clock_rate_disable, }; static struct clk osc_clk = { @@ -4311,16 +4351,20 @@ _REGISTER_CLOCK(NULL, "csi_mclk1", csi0_clk), _REGISTER_CLOCK(NULL, "csi_mclk2", csi1_clk), _REGISTER_CLOCK(NULL, "tve_clk", tve_clk), +#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) // IMX + _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk[0]), + _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk[0]), + _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk[0]), +#else // FSL _REGISTER_CLOCK("mxcintuart.0", NULL, uart1_clk[0]), _REGISTER_CLOCK("mxcintuart.1", NULL, uart2_clk[0]), _REGISTER_CLOCK("mxcintuart.2", NULL, uart3_clk[0]), - _REGISTER_CLOCK(NULL, "i2c_clk", i2c_clk[0]), +#endif + _REGISTER_CLOCK(NULL, "i2c_clk", i2c_clk[0]), // masu FIXME + _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk[0]), _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk[1]), _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk[0]), _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk[0]), - _REGISTER_CLOCK("mxc_spi.0", NULL, cspi1_clk[0]), - _REGISTER_CLOCK("mxc_spi.1", NULL, cspi2_clk[0]), - _REGISTER_CLOCK("mxc_spi.2", NULL, cspi3_clk), _REGISTER_CLOCK(NULL, "ssi_lp_apm_clk", ssi_lp_apm_clk), _REGISTER_CLOCK("mxc_ssi.0", NULL, ssi1_clk[0]), _REGISTER_CLOCK("mxc_ssi.1", NULL, ssi2_clk[0]), @@ -4328,11 +4372,19 @@ _REGISTER_CLOCK(NULL, "ssi_ext1_clk", ssi_ext1_clk), _REGISTER_CLOCK(NULL, "ssi_ext2_clk", ssi_ext2_clk), _REGISTER_CLOCK(NULL, "iim_clk", iim_clk), - _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk[0]), + _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk[0]), // FSL _REGISTER_CLOCK(NULL, "usb_ahb_clk", usb_ahb_clk), _REGISTER_CLOCK(NULL, "usb_phy1_clk", usb_phy_clk[0]), _REGISTER_CLOCK(NULL, "usb_utmi_clk", usb_utmi_clk), _REGISTER_CLOCK(NULL, "usb_clk", usb_clk), + _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk[0]), // IMX + _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_ahb_clk), + _REGISTER_CLOCK("mxc-ehci.0", "usb_phy1", usb_phy_clk[0]), + _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk[0]), + _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_ahb_clk), + _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk[0]), + _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_ahb_clk), + _REGISTER_CLOCK("fsl-usb2-udc", "usb_phy1", usb_phy_clk[0]), _REGISTER_CLOCK("mxsdhci.0", NULL, esdhc1_clk[0]), _REGISTER_CLOCK("mxsdhci.1", NULL, esdhc2_clk[0]), _REGISTER_CLOCK("mxsdhci.2", NULL, esdhc3_clk[0]), @@ -4359,10 +4411,21 @@ _REGISTER_CLOCK(NULL, "gpt", gpt_clk[0]), _REGISTER_CLOCK("fec.0", NULL, fec_clk[0]), _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk), +#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) // IMX + _REGISTER_CLOCK("imx5x-ecspi.0", NULL, cspi1_clk[0]), + _REGISTER_CLOCK("imx5x-ecspi.1", NULL, cspi2_clk[0]), + _REGISTER_CLOCK("imx5x-cspi.0", NULL, cspi3_clk), +#else // FSL + _REGISTER_CLOCK("mxc_spi.0", NULL, cspi1_clk[0]), + _REGISTER_CLOCK("mxc_spi.1", NULL, cspi2_clk[0]), + _REGISTER_CLOCK("mxc_spi.2", NULL, cspi3_clk), +#endif }; static struct clk_lookup mx51_lookups[] = { _REGISTER_CLOCK("mxc_i2c_hs.3", NULL, hsi2c_serial_clk), + _REGISTER_CLOCK("mxc_keypad.0", "kpp_clk", dummy_clk), + _REGISTER_CLOCK(NULL, "wdog_clk", dummy_clk), _REGISTER_CLOCK("mxc_sim.0", NULL, sim_clk[0]), _REGISTER_CLOCK("mxc_alsa_spdif.0", NULL, spdif1_clk[0]), _REGISTER_CLOCK(NULL, "mipi_hsp_clk", mipi_hsp_clk), @@ -4453,7 +4516,7 @@ } } - +#ifdef CONFIG_ARCH_MX51 int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2) { __iomem void *base; @@ -4768,13 +4831,11 @@ base = ioremap(GPT1_BASE_ADDR, SZ_4K); mxc_timer_init(&gpt_clk[0], base, MXC_INT_GPT); - - lp_med_freq = 0; - lp_high_freq = 0; - return 0; } +#endif +#ifdef CONFIG_ARCH_MX53 int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2) { __iomem void *base; @@ -5004,12 +5065,12 @@ */ pll1_rate = clk_get_rate(&pll1_main_clk); - if (pll1_rate > 1000000000) +// if (pll1_rate > 1000000000) mx53_set_cpu_part_number(IMX53_CEC_1_2G); - else if (pll1_rate > 800000000) - mx53_set_cpu_part_number(IMX53_CEC); - else - mx53_set_cpu_part_number(IMX53_AEC); +// else if (pll1_rate > 800000000) +// mx53_set_cpu_part_number(IMX53_CEC); +// else +// mx53_set_cpu_part_number(IMX53_AEC); /* Set the current working point. */ cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); @@ -5038,12 +5099,9 @@ 1190000)); base = ioremap(MX53_BASE_ADDR(GPT1_BASE_ADDR), SZ_4K); mxc_timer_init(&gpt_clk[0], base, MXC_INT_GPT); - - lp_med_freq = 0; - lp_high_freq = 0; - return 0; } +#endif /*! * Setup cpu clock based on working point. diff -urN linux-2.6.35.3.fsl/arch/arm/mach-mx5/devices.c linux-2.6.35.3.work/arch/arm/mach-mx5/devices.c --- linux-2.6.35.3.fsl/arch/arm/mach-mx5/devices.c 2015-11-23 20:06:25.527833714 +0100 +++ linux-2.6.35.3.work/arch/arm/mach-mx5/devices.c 2015-11-22 16:44:14.963616903 +0100 @@ -606,7 +606,11 @@ static u64 spi_dma_mask = DMA_BIT_MASK(32); struct platform_device mxcspi1_device = { +#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) + .name = "imx5x-ecspi", +#else .name = "mxc_spi", +#endif .id = 0, .num_resources = ARRAY_SIZE(mxcspi1_resources), .resource = mxcspi1_resources, @@ -635,7 +639,11 @@ }; struct platform_device mxcspi2_device = { +#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) + .name = "imx5x-ecspi", +#else .name = "mxc_spi", +#endif .id = 1, .num_resources = ARRAY_SIZE(mxcspi2_resources), .resource = mxcspi2_resources, @@ -659,12 +667,76 @@ }; struct platform_device mxcspi3_device = { +#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) + .name = "imx5x-cspi", +#else .name = "mxc_spi", +#endif .id = 2, .num_resources = ARRAY_SIZE(mxcspi3_resources), .resource = mxcspi3_resources, }; +static struct resource mxcuart1_resources[] = { + { + .start = UART1_BASE_ADDR, + .end = UART1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_UART1, + .end = MXC_INT_UART1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource mxcuart2_resources[] = { + { + .start = UART2_BASE_ADDR, + .end = UART2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_UART2, + .end = MXC_INT_UART2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource mxcuart3_resources[] = { + { + .start = UART3_BASE_ADDR, + .end = UART3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_UART3, + .end = MXC_INT_UART3, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device mxcuart_devices[] = { + { + .name = "imx-uart", + .id = 0, + .num_resources = ARRAY_SIZE(mxcuart1_resources), + .resource = mxcuart1_resources, + }, + { + .name = "imx-uart", + .id = 1, + .num_resources = ARRAY_SIZE(mxcuart2_resources), + .resource = mxcuart2_resources, + }, + { + .name = "imx-uart", + .id = 2, + .num_resources = ARRAY_SIZE(mxcuart3_resources), + .resource = mxcuart3_resources, + }, +}; + static struct resource mxci2c1_resources[] = { { .start = I2C1_BASE_ADDR, @@ -1261,7 +1333,11 @@ }; struct platform_device mxc_usbdr_host_device = { +#if defined(CONFIG_USB_EHCI_ARC) || defined(CONFIG_USB_EHCI_ARC_MODULE) .name = "fsl-ehci", +#else + .name = "mxc-ehci", +#endif .id = 0, .num_resources = ARRAY_SIZE(usbotg_host_resources), .resource = usbotg_host_resources, @@ -1302,7 +1378,11 @@ }; struct platform_device mxc_usbh1_device = { +#if defined(CONFIG_USB_EHCI_ARC) || defined(CONFIG_USB_EHCI_ARC_MODULE) .name = "fsl-ehci", +#else + .name = "mxc-ehci", +#endif .id = 1, .num_resources = ARRAY_SIZE(usbh1_resources), .resource = usbh1_resources, diff -urN linux-2.6.35.3.fsl/arch/arm/mach-mx5/devices.h linux-2.6.35.3.work/arch/arm/mach-mx5/devices.h --- linux-2.6.35.3.fsl/arch/arm/mach-mx5/devices.h 2015-11-23 20:06:25.527833714 +0100 +++ linux-2.6.35.3.work/arch/arm/mach-mx5/devices.h 2015-11-22 16:44:14.967616903 +0100 @@ -40,6 +40,7 @@ extern struct platform_device mxcspi1_device; extern struct platform_device mxcspi2_device; extern struct platform_device mxcspi3_device; +extern struct platform_device mxcuart_devices[]; extern struct platform_device mxci2c_devices[]; extern struct platform_device mxci2c_hs_device; extern struct platform_device mxc_tve_device; diff -urN linux-2.6.35.3.fsl/arch/arm/mach-mx5/Kconfig linux-2.6.35.3.work/arch/arm/mach-mx5/Kconfig --- linux-2.6.35.3.fsl/arch/arm/mach-mx5/Kconfig 2015-11-23 20:06:25.531833714 +0100 +++ linux-2.6.35.3.work/arch/arm/mach-mx5/Kconfig 2015-11-22 16:44:14.967616903 +0100 @@ -63,6 +63,13 @@ Include support for MX53 SMD platform. This includes specific configurations for the board and its peripherals. +config MACH_VMX53 + bool "Support VMX53 module" + select ARCH_MX53 + help + Include support for VMX53 module. This includes specific + configurations for the board and its peripherals. + config MACH_MX53_LOCO bool "Support MX53 LOCO platform" select ARCH_MX53 diff -urN linux-2.6.35.3.fsl/arch/arm/mach-mx5/Makefile linux-2.6.35.3.work/arch/arm/mach-mx5/Makefile --- linux-2.6.35.3.fsl/arch/arm/mach-mx5/Makefile 2015-11-23 20:06:25.531833714 +0100 +++ linux-2.6.35.3.work/arch/arm/mach-mx5/Makefile 2015-11-22 16:44:14.967616903 +0100 @@ -16,6 +16,7 @@ obj-$(CONFIG_MACH_MX53_EVK) += mx53_evk.o mx53_evk_pmic_mc13892.o obj-$(CONFIG_MACH_MX53_ARD) += mx53_ard.o mx53_ard_pmic_ltc3589.o obj-$(CONFIG_MACH_MX53_SMD) += mx53_smd.o pm_i2c.o pm_da9053.o mx53_smd_pmic_da9053.o +obj-$(CONFIG_MACH_VMX53) += mx53_vmx.o pm_i2c.o pm_da9053.o mx53_loco_pmic_da9053.o obj-$(CONFIG_MACH_MX53_LOCO) += mx53_loco.o pm_i2c.o pm_da9053.o mx53_loco_pmic_mc34708.o mx53_loco_pmic_da9053.o obj-$(CONFIG_MACH_MX50_ARM2) += mx50_arm2.o mx50_arm2_pmic_mc13892.o obj-$(CONFIG_MACH_MX50_RDP) += mx50_rdp.o mx50_rdp_pmic_mc13892.o mx50_rdp_pmic_mc34708.o diff -urN linux-2.6.35.3.fsl/arch/arm/mach-mx5/mx53_vmx.c linux-2.6.35.3.work/arch/arm/mach-mx5/mx53_vmx.c --- linux-2.6.35.3.fsl/arch/arm/mach-mx5/mx53_vmx.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.35.3.work/arch/arm/mach-mx5/mx53_vmx.c 2015-11-22 16:57:47.131600861 +0100 @@ -0,0 +1,1960 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "crm_regs.h" +#include "devices.h" +#include "usb.h" +#include "pmic.h" + +// Fix spi and nand naming collision +//#include +struct spi_flash_platform_data { + char *name; + struct mtd_partition *parts; + unsigned int nr_parts; + char *type; +}; +/*! + * @file mach-mx5/mx53_loco.c + * + * @brief This file contains MX53 loco board specific initialization routines. + * + * @ingroup MSL_MX53 + */ + +/* MX53 LOCO GPIO PIN configurations */ +//#define NVDD_FAULT (0*32 + 5) /* GPIO1_5 */ + +//#define FEC_INT (1*32 + 4) /* GPIO_2_4 */ +//#define HEADPHONE_DEC_B (1*32 + 5) /* GPIO_2_5 */ +//#define MIC_DEC_B (1*32 + 6) /* GPIO_2_6 */ +//#define USER_UI1 (1*32 + 14) /* GPIO_2_14 */ +//#define USER_UI2 (1*32 + 15) /* GPIO_2_15 */ +//#define MX53_nONKEY (0*32 + 8) /* GPIO_1_8 */ + +//#define SD3_CD (2*32 + 11) /* GPIO_3_11 */ +//#define SD3_WP (2*32 + 12) /* GPIO_3_12 */ +//#define DISP0_POWER_EN (2*32 + 24) /* GPIO_3_24 */ +//#define DISP0_DET_INT (2*32 + 31) /* GPIO_3_31 */ + +//#define DISP0_RESET (4*32 + 0) /* GPIO_5_0 */ + +//#define CSI0_RTSB (5*32 + 9) /* GPIO_6_9 */ +//#define CSI0_PWDN (5*32 + 10) /* GPIO_6_10 */ +//#define ACCL_EN (5*32 + 14) /* GPIO_6_14 */ +//#define ACCL_INT1_IN (5*32 + 15) /* GPIO_6_15 */ +//#define ACCL_INT2_IN (5*32 + 16) /* GPIO_6_16 */ + +//#define LCD_BLT_EN (6*32 + 2) /* GPIO_7_2 */ +//#define FEC_RST (6*32 + 6) /* GPIO_7_6 */ +//#define USER_LED_EN (6*32 + 7) /* GPIO_7_7 */ +//#define USB_PWREN (6*32 + 8) /* GPIO_7_8 */ +//#define NIRQ (6*32 + 11) /* GPIO7_11 */ +//#define MX53_LOCO_MC34708_IRQ_REVA (4*32 + 30) /* GPIO5_30 */ +//#define MX53_LOCO_MC34708_IRQ_REVB (4*32 + 23) /* GPIO5_23 */ + +#define MX53_OFFSET (0x20000000) +#define TZIC_WAKEUP0_OFFSET (0x0E00) +#define TZIC_WAKEUP1_OFFSET (0x0E04) +#define TZIC_WAKEUP2_OFFSET (0x0E08) +#define TZIC_WAKEUP3_OFFSET (0x0E0C) +#define GPIO7_0_11_IRQ_BIT (0x1<<11) + + +#define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr)) + +// SD/MMC +#define VMX53_SD1_SEL IMX_GPIO_NR(4, 0) +#define VMX53_SD1_CD IMX_GPIO_NR(3, 24) +//#define VMX53_SD1_WP +#define VMX53_SD2_CD IMX_GPIO_NR(3, 25) +#define VMX53_SD2_WP IMX_GPIO_NR(2, 19) + +// FEC +#define VMX53_FEC_PEN IMX_GPIO_NR(4, 1) +#define VMX53_FEC_RST IMX_GPIO_NR(4, 2) + +// PMIC +#define VMX53_nVDD_FAULT IMX_GPIO_NR(4, 3) +#define VMX53_nONKEY IMX_GPIO_NR(4, 4) +#define VMX53_nIRQ IMX_GPIO_NR(7, 11) + +// GPIO LED +#define VMX53_DISP0_PEN IMX_GPIO_NR(5, 4) +#define VMX53_LED_RED IMX_GPIO_NR(3, 29) +#define VMX53_LED_ORANGE IMX_GPIO_NR(2, 31) + +// SPI +#define VMX53_ECSPI1_CS0 IMX_GPIO_NR(2, 30) +#define VMX53_ECSPI1_CS1 IMX_GPIO_NR(3, 19) +#define VMX53_TSC2046_IRQ IMX_GPIO_NR(2, 20) +#define VMX53_TSC2046_CS IMX_GPIO_NR(2, 16) +#define VMX53_MCP2515_IRQ IMX_GPIO_NR(2, 21) +#define VMX53_MCP2515_CS IMX_GPIO_NR(2, 17) + +// I2C_INT +#define VMX53_I2C_INT IMX_GPIO_NR(6, 15) + +// USB +#define VMX53_USBH1_PEN IMX_GPIO_NR(3, 31) +#define VMX53_USBH1_OC IMX_GPIO_NR(3, 30) +#define VMX53_USBO_PEN IMX_GPIO_NR(1, 7) +#define VMX53_USBO_OC IMX_GPIO_NR(1, 8) + +// ACCL +#define VMX53_ACCL_INT1 IMX_GPIO_NR(3, 20) +#define VMX53_ACCL_INT2 IMX_GPIO_NR(5, 2) + +#define VMX53_RESET_OUT IMX_GPIO_NR(7, 12) + +extern void pm_i2c_init(u32 base_addr); +//static u32 mx53_loco_mc34708_irq; +static iomux_v3_cfg_t mx53_loco_pads[] = { + /* UART1 */ + MX53_PAD_PATA_DIOW__UART1_TXD_MUX, + MX53_PAD_PATA_DMACK__UART1_RXD_MUX, + MX53_PAD_PATA_IORDY__UART1_RTS, + MX53_PAD_PATA_RESET_B__UART1_CTS, + + /* UART2 */ + MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, + MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, + MX53_PAD_PATA_DIOR__UART2_RTS, + MX53_PAD_PATA_INTRQ__UART2_CTS, + + /* UART3 */ + MX53_PAD_PATA_CS_0__UART3_TXD_MUX, + MX53_PAD_PATA_CS_1__UART3_RXD_MUX, + MX53_PAD_PATA_DA_2__UART3_RTS, + MX53_PAD_PATA_DA_1__UART3_CTS, + + /* FEC */ + MX53_PAD_FEC_MDC__FEC_MDC, + MX53_PAD_FEC_MDIO__FEC_MDIO, + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, + MX53_PAD_FEC_RX_ER__FEC_RX_ER, + MX53_PAD_FEC_CRS_DV__FEC_RX_DV, + MX53_PAD_FEC_RXD1__FEC_RDATA_1, + MX53_PAD_FEC_RXD0__FEC_RDATA_0, + MX53_PAD_FEC_TX_EN__FEC_TX_EN, + MX53_PAD_FEC_TXD1__FEC_TDATA_1, + MX53_PAD_FEC_TXD0__FEC_TDATA_0, + + /* SSI1 = AUDMUX5 */ + MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC, + MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD, + MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS, + MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD, + + /* SSI2 */ + MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC, + MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD, + MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS, + MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD, + + /* ECSPI */ + MX53_PAD_EIM_D16__ECSPI1_SCLK, + MX53_PAD_EIM_D17__ECSPI1_MISO, + MX53_PAD_EIM_D18__ECSPI1_MOSI, +// MX53_PAD_GPIO_19__ECSPI1_RDY, + MX53_PAD_GPIO_19__GPIO4_5, +// MX53_PAD_EIM_D19__ECSPI1_SS1, +// MX53_PAD_EIM_EB2__ECSPI1_SS0, + + /* I2C1 */ +#define VMX53_PAD_EIM_D21__I2C1_SCL IOMUX_PAD(0x474, 0x12C, 5 | IOMUX_CONFIG_SION, 0x814, 1, NO_PAD_CTRL) +#define VMX53_PAD_EIM_D28__I2C1_SDA IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, NO_PAD_CTRL) + + VMX53_PAD_EIM_D21__I2C1_SCL, + VMX53_PAD_EIM_D28__I2C1_SDA, + /* I2C3 */ +#define VMX53_PAD_GPIO_3__I2C3_SCL IOMUX_PAD(0x6B0, 0x320, 2 | IOMUX_CONFIG_SION, 0x824, 1, NO_PAD_CTRL) +#define VMX53_PAD_GPIO_6__I2C3_SDA IOMUX_PAD(0x6B4, 0x324, 2 | IOMUX_CONFIG_SION, 0x828, 1, NO_PAD_CTRL) + + VMX53_PAD_GPIO_3__I2C3_SCL, + VMX53_PAD_GPIO_6__I2C3_SDA, + + /* KEYPAD */ +#define VMX53_PAD_KEY_COL2__KPP_COL_2 (_MX53_PAD_KEY_COL2__KPP_COL_2 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)) +#define VMX53_PAD_KEY_COL3__KPP_COL_3 (_MX53_PAD_KEY_COL3__KPP_COL_3 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)) +#define VMX53_PAD_KEY_COL4__KPP_COL_4 (_MX53_PAD_KEY_COL4__KPP_COL_4 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)) +#define VMX53_PAD_GPIO_9__KPP_COL_6 (_MX53_PAD_GPIO_9__KPP_COL_6 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)) +#define VMX53_PAD_GPIO_4__KPP_COL_7 (_MX53_PAD_GPIO_4__KPP_COL_7 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)) + +#define VMX53_PAD_KEY_ROW2__KPP_ROW_2 (_MX53_PAD_KEY_ROW2__KPP_ROW_2 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)) +#define VMX53_PAD_KEY_ROW3__KPP_ROW_3 (_MX53_PAD_KEY_ROW3__KPP_ROW_3 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)) +#define VMX53_PAD_KEY_ROW4__KPP_ROW_4 (_MX53_PAD_KEY_ROW4__KPP_ROW_4 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)) +#define VMX53_PAD_GPIO_2__KPP_ROW_6 (_MX53_PAD_GPIO_2__KPP_ROW_6 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)) +#define VMX53_PAD_GPIO_5__KPP_ROW_7 (_MX53_PAD_GPIO_5__KPP_ROW_7 | MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)) + + VMX53_PAD_GPIO_9__KPP_COL_6, + VMX53_PAD_GPIO_4__KPP_COL_7, + VMX53_PAD_KEY_COL2__KPP_COL_2, + VMX53_PAD_KEY_COL3__KPP_COL_3, +// VMX53_PAD_KEY_COL4__KPP_COL_4, + MX53_PAD_KEY_COL4__CAN2_TXCAN, + VMX53_PAD_GPIO_2__KPP_ROW_6, + VMX53_PAD_GPIO_5__KPP_ROW_7, + VMX53_PAD_KEY_ROW2__KPP_ROW_2, + VMX53_PAD_KEY_ROW3__KPP_ROW_3, +// VMX53_PAD_KEY_ROW4__KPP_ROW_4, + MX53_PAD_KEY_ROW4__CAN2_RXCAN, + + /* SD1 */ + MX53_PAD_SD1_CMD__ESDHC1_CMD, + MX53_PAD_SD1_CLK__ESDHC1_CLK, + MX53_PAD_SD1_DATA0__ESDHC1_DAT0, + MX53_PAD_SD1_DATA1__ESDHC1_DAT1, + MX53_PAD_SD1_DATA2__ESDHC1_DAT2, + MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + + /* SD2 */ + MX53_PAD_SD2_CMD__ESDHC2_CMD, + MX53_PAD_SD2_CLK__ESDHC2_CLK, + MX53_PAD_SD2_DATA0__ESDHC2_DAT0, + MX53_PAD_SD2_DATA1__ESDHC2_DAT1, + MX53_PAD_SD2_DATA2__ESDHC2_DAT2, + MX53_PAD_SD2_DATA3__ESDHC2_DAT3, + + /* CSI0 */ + MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12, + MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13, + MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14, + MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15, + MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16, + MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17, + MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18, + MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19, + MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC, + MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC, + MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK, + MX53_PAD_GPIO_0__CCM_CLKO, // CSI0_MCLK + + /* DISPLAY */ + MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK, + MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, + MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, + MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, + MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0, + MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1, + MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2, + MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3, + MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4, + MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5, + MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6, + MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7, + MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8, + MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9, + MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10, + MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11, + MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12, + MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13, + MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14, + MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15, + MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16, + MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17, + MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18, + MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19, + MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20, + MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21, + MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22, + MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23, + + /* PWM */ +// MX53_PAD_GPIO_1__GPIO1_1, + MX53_PAD_GPIO_1__PWM2_PWMO, + + /* OWIRE */ + MX53_PAD_GPIO_18__OWIRE_LINE, + + /* GPIO */ + MX53_PAD_GPIO_13__GPIO4_3, // DA9053 nVDD_FAULT + MX53_PAD_GPIO_14__GPIO4_4, // nONKEY + MX53_PAD_GPIO_16__GPIO7_11, // DA9053 nIRQ + MX53_PAD_GPIO_17__GPIO7_12, // RESET_OUT + + MX53_PAD_EIM_A24__GPIO5_4, // PSAVE + MX53_PAD_EIM_D29__GPIO3_29, // LED RED + MX53_PAD_EIM_EB3__GPIO2_31, // LED ORANGE + + MX53_PAD_EIM_D20__GPIO3_20, // ACCL_INT1 + MX53_PAD_EIM_A25__GPIO5_2, // ACCL_INT2 + + MX53_PAD_GPIO_10__GPIO4_0, // SD1_SEL + MX53_PAD_EIM_D24__GPIO3_24, // SD1_CD + MX53_PAD_EIM_D25__GPIO3_25, // SD2_CD + MX53_PAD_EIM_A19__GPIO2_19, // SD2_WP + + MX53_PAD_GPIO_11__GPIO4_1, // FEC_PEN + MX53_PAD_GPIO_12__GPIO4_2, // FEC_RST + + MX53_PAD_EIM_D19__GPIO3_19, // SS1 + MX53_PAD_EIM_EB2__GPIO2_30, // SS0 + MX53_PAD_EIM_A18__GPIO2_20, // TSC2046_IRQ + MX53_PAD_EIM_A17__GPIO2_21, // MCP2515_IRQ + MX53_PAD_EIM_A22__GPIO2_16, // TSC2046_CS + MX53_PAD_EIM_A21__GPIO2_17, // MCP2515_CS + + MX53_PAD_NANDF_CS2__GPIO6_15, // I2C_INT + + MX53_PAD_EIM_D26__GPIO3_26, // SSI1_INT + MX53_PAD_EIM_D27__GPIO3_27, // SSI2_INT + + MX53_PAD_EIM_D31__GPIO3_31, // USBH1_PEN + MX53_PAD_EIM_D30__GPIO3_30, // USBH1_OC + MX53_PAD_GPIO_7__GPIO1_7, // USB0_PEN + MX53_PAD_GPIO_8__GPIO1_8, // USB0_OC + +}; + +static void loco_da9053_irq_wakeup_only_fixup(void) +{ + void __iomem *tzic_base; + tzic_base = ioremap(MX53_TZIC_BASE_ADDR, SZ_4K); + if (NULL == tzic_base) { + pr_err("fail to map MX53_TZIC_BASE_ADDR\n"); + return; + } + __raw_writel(0, tzic_base + TZIC_WAKEUP0_OFFSET); + __raw_writel(0, tzic_base + TZIC_WAKEUP1_OFFSET); + __raw_writel(0, tzic_base + TZIC_WAKEUP2_OFFSET); + /* only enable irq wakeup for da9053 */ + __raw_writel(GPIO7_0_11_IRQ_BIT, tzic_base + TZIC_WAKEUP3_OFFSET); + iounmap(tzic_base); + pr_info("only da9053 irq is wakeup-enabled\n"); +} + +static void loco_suspend_enter(void) +{ +// if (!board_is_mx53_loco_mc34708()) { + loco_da9053_irq_wakeup_only_fixup(); + da9053_suspend_cmd_sw(); +// } +} + +static void loco_suspend_exit(void) +{ +// if (!board_is_mx53_loco_mc34708()) { + if (da9053_get_chip_version()) + da9053_restore_volt_settings(); +// } +} + +static struct mxc_pm_platform_data loco_pm_data = { + .suspend_enter = loco_suspend_enter, + .suspend_exit = loco_suspend_exit, +}; + +static struct fb_videomode video_modes[] = { + { + .name = "VGA", + .refresh = 60, + .xres = 640, + .yres = 480, + .pixclock = KHZ2PICOS(25175), + .left_margin = 48, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 96, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + { + .name = "SVGA", + .refresh = 60, + .xres = 800, + .yres = 600, + .pixclock = KHZ2PICOS(40000), + .left_margin = 88, + .right_margin = 40, + .upper_margin = 23, + .lower_margin = 2, + .hsync_len = 128, + .vsync_len = 5, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + { + .name = "XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = KHZ2PICOS(65000), + .left_margin = 160, + .right_margin = 24, + .upper_margin = 29, + .lower_margin = 3, + .hsync_len = 136, + .vsync_len = 6, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + { + /* VGA 1280x1024 108M pixel clk output */ + "SXGA", 60, 1280, 1024, 9259, + 48, 248, + 1, 38, + 112, 3, + 0, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 1600x1200 @ 60 Hz 162M pixel clk*/ + "UXGA", 60, 1600, 1200, 6172, + 304, 64, + 1, 46, + 192, 3, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + .name = "WXGA", + .refresh = 60, + .xres = 1280, + .yres = 800, + .pixclock = KHZ2PICOS(83460), + .left_margin = 200, + .right_margin = 64, + .upper_margin = 24, + .lower_margin = 1, + .hsync_len = 136, + .vsync_len = 3, + .sync = FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + { + /* NTSC TV output */ + "TV-NTSC", 60, 720, 480, 74074, + 122, 15, + 18, 26, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_INTERLACED, + 0,}, + { + /* PAL TV output */ + "TV-PAL", 50, 720, 576, 74074, + 132, 11, + 22, 26, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_INTERLACED | FB_VMODE_ODD_FLD_FIRST, + 0,}, + { + /* 1080i50 TV output */ + "1080I50", 50, 1920, 1080, 13468, + 192, 527, + 20, 24, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_INTERLACED | FB_VMODE_ODD_FLD_FIRST, + 0,}, + { + /* 1080i60 TV output */ + "1080I60", 60, 1920, 1080, 13468, + 192, 87, + 20, 24, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_INTERLACED | FB_VMODE_ODD_FLD_FIRST, + 0,}, + { + /* 800x480 @ 57 Hz , pixel clk @ 27MHz */ + "CLAA-WVGA", 57, 800, 480, 37037, 40, 60, 10, 10, 20, 10, + FB_SYNC_CLK_LAT_FALL, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 800x480 @ 60 Hz , pixel clk @ 32MHz */ + "SEIKO-WVGA", 60, 800, 480, 29850, 89, 164, 23, 10, 10, 10, + FB_SYNC_CLK_LAT_FALL, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 720p30 TV output */ + "720P30", 30, 1280, 720, 13468, + 260, 1759, + 25, 4, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* "1280x720-58" */ + "720P60", 60, 1280, 720, 13888, + 220, 110, + 20, 5, + 40, 5, + + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 1080p24 TV output */ + "1080P24", 24, 1920, 1080, 13468, + 192, 637, + 38, 6, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 1080p25 TV output */ + "1080P25", 25, 1920, 1080, 13468, + 192, 527, + 38, 6, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 1080p30 TV output */ + "1080P30", 30, 1920, 1080, 13468, + 192, 87, + 38, 6, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + "1080P60", 60, 1920, 1080, 7692, + 100, 40, + 30, 3, + 10, 2, + 0, + FB_VMODE_NONINTERLACED, + 0,}, + { + // FG0700K5DSSWAGT1 + .name = "DATAIMAGE", + .refresh = 59, + .xres = 800, + .yres = 480, + .pixclock = KHZ2PICOS(33260), + .left_margin = 160, + .right_margin = 54, + .upper_margin = 10, + .lower_margin = 10, + .hsync_len = 86, + .vsync_len = 4, + .sync = FB_SYNC_CLK_LAT_FALL, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + { + // t-51750gd065j-lw + .name = "OPTREX", + .refresh = 59, + .xres = 640, + .yres = 480, + .pixclock = KHZ2PICOS(24000), + .left_margin = 84, + .right_margin = 10, + .upper_margin = 20, + .lower_margin = 20, + .hsync_len = 34, + .vsync_len = 5, + .sync = FB_SYNC_CLK_LAT_FALL, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + { + .name = "EDT", + .refresh = 60, + .xres = 640, + .yres = 480, + .pixclock = KHZ2PICOS(25175), + .left_margin = 48, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 96, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + { + // BRAVIA 1360x768@56 + .name = "BRAVIA", + .refresh = 56, + .xres = 1360, + .yres = 768, + .pixclock = KHZ2PICOS(80141), + .left_margin = 240, + .right_margin = 80, + .upper_margin = 18, + .lower_margin = 3, + .hsync_len = 112, + .vsync_len = 6, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, +}; + +static struct platform_pwm_backlight_data mxc_pwm_backlight_data = { + .pwm_id = 1, + .max_brightness = 255, + .dft_brightness = 127, + .pwm_period_ns = KHZ2PICOS(20000), +}; + +// pwm_backlight=dft_brightness,max_brightness,pwm_period_ns +static int __init pwm_backlight(char* options) +{ + int nints, pwm_data[4]; + + get_options(options, 4, pwm_data); + nints = pwm_data[0]; + + if( nints > 0) + mxc_pwm_backlight_data.dft_brightness = pwm_data[1]; + if( nints > 1) + mxc_pwm_backlight_data.max_brightness = pwm_data[2]; + if( nints > 2) + mxc_pwm_backlight_data.pwm_period_ns = pwm_data[3]; + + return 1; +} + +__setup("pwm_backlight=", pwm_backlight); + +static struct flexcan_platform_data flexcan1_data = { + .core_reg = NULL, + .io_reg = NULL, + .root_clk_id = "lp_apm", /*lp_apm is 24MHz */ +// .xcvr_enable = flexcan_xcvr_enable, + .br_clksrc = 0, + .br_rjw = 2, + .br_presdiv = 3, + .br_propseg = 2, + .br_pseg1 = 3, + .br_pseg2 = 3, + .bcc = 1, + .srx_dis = 1, + .smp = 1, + .boff_rec = 1, + .ext_msg = 1, + .std_msg = 1, +}; + +extern void mx5_ipu_reset(void); +static struct mxc_ipu_config mxc_ipu_data = { + .rev = 3, + .reset = mx5_ipu_reset, +}; + +extern void mx5_vpu_reset(void); +static struct mxc_vpu_platform_data mxc_vpu_data = { + .iram_enable = true, + .iram_size = 0x14000, + .reset = mx5_vpu_reset, +}; + +static struct fec_platform_data fec_data = { + .phy = PHY_INTERFACE_MODE_RMII, +}; + +static struct mxc_dvfs_platform_data dvfs_core_data = { + .clk1_id = "cpu_clk", + .clk2_id = "gpc_dvfs_clk", + .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET, + .gpc_vcr_offset = MXC_GPC_VCR_OFFSET, + .ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET, + .ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET, + .ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET, + .prediv_mask = 0x1F800, + .prediv_offset = 11, + .prediv_val = 3, + .div3ck_mask = 0xE0000000, + .div3ck_offset = 29, + .div3ck_val = 2, + .emac_val = 0x08, + .upthr_val = 25, + .dnthr_val = 9, + .pncthr_val = 33, + .upcnt_val = 10, + .dncnt_val = 10, + .delay_time = 30, +}; + +static struct mxc_bus_freq_platform_data bus_freq_data; + +static struct tve_platform_data tve_data = { + .boot_enable = MXC_TVE_VGA, +}; + +static struct ldb_platform_data ldb_data = { + .ext_ref = 1, +}; + +static void mxc_iim_enable_fuse(void) +{ + u32 reg; + + if (!ccm_base) + return; + + /* enable fuse blown */ + reg = readl(ccm_base + 0x64); + reg |= 0x10; + writel(reg, ccm_base + 0x64); +} + +static void mxc_iim_disable_fuse(void) +{ + u32 reg; + + if (!ccm_base) + return; + /* enable fuse blown */ + reg = readl(ccm_base + 0x64); + reg &= ~0x10; + writel(reg, ccm_base + 0x64); +} + +static struct mxc_iim_data iim_data = { + .bank_start = MXC_IIM_MX53_BANK_START_ADDR, + .bank_end = MXC_IIM_MX53_BANK_END_ADDR, + .enable_fuse = mxc_iim_enable_fuse, + .disable_fuse = mxc_iim_disable_fuse, +}; + +static struct resource mxcfb_resources[] = { + [0] = { + .flags = IORESOURCE_MEM, + }, +}; + +static struct mxc_fb_platform_data fb_data[] = { + { + .interface_pix_fmt = IPU_PIX_FMT_RGB24, + .mode_str = "VGA", + .mode = video_modes, + .num_modes = ARRAY_SIZE(video_modes), + }, + { + .interface_pix_fmt = IPU_PIX_FMT_RGB24, + .mode_str = "VGA", + .mode = video_modes, + .num_modes = ARRAY_SIZE(video_modes), + }, +}; + +extern int primary_di; +static int __init mxc_init_fb(void) +{ +// if (!machine_is_mx53_loco()) +// return 0; + + /*for loco board, set default display as VGA*/ + if (primary_di < 0) + primary_di = 0; + + if (primary_di) { + printk(KERN_INFO "DI1 is primary\n"); + /* DI1 -> DP-BG channel: */ + mxc_fb_devices[1].num_resources = ARRAY_SIZE(mxcfb_resources); + mxc_fb_devices[1].resource = mxcfb_resources; + mxc_register_device(&mxc_fb_devices[1], &fb_data[1]); + + /* DI0 -> DC channel: */ + mxc_register_device(&mxc_fb_devices[0], &fb_data[0]); + } else { + printk(KERN_INFO "DI0 is primary\n"); + + /* DI0 -> DP-BG channel: */ + mxc_fb_devices[0].num_resources = ARRAY_SIZE(mxcfb_resources); + mxc_fb_devices[0].resource = mxcfb_resources; + mxc_register_device(&mxc_fb_devices[0], &fb_data[0]); + + /* DI1 -> DC channel: */ + mxc_register_device(&mxc_fb_devices[1], &fb_data[1]); + } + + /* + * DI0/1 DP-FG channel: + */ + mxc_register_device(&mxc_fb_devices[2], NULL); + + return 0; +} +device_initcall(mxc_init_fb); +#if 0 +static void sii902x_hdmi_reset(void) +{ + gpio_set_value(DISP0_RESET, 0); + msleep(10); + gpio_set_value(DISP0_RESET, 1); + msleep(10); +} + +static int sii902x_get_pins(void) +{ + /* Sii902x HDMI controller */ + gpio_request(DISP0_RESET, "disp0-reset"); + gpio_direction_output(DISP0_RESET, 0); + gpio_request(DISP0_DET_INT, "disp0-detect"); + gpio_direction_input(DISP0_DET_INT); + return 1; +} + +static void sii902x_put_pins(void) +{ + gpio_free(DISP0_RESET); + gpio_free(DISP0_DET_INT); +} + +static struct mxc_lcd_platform_data sii902x_hdmi_data = { + .reset = sii902x_hdmi_reset, + .fb_id = "DISP3 BG", + .get_pins = sii902x_get_pins, + .put_pins = sii902x_put_pins, +}; +#endif + +/* NAND Flash Partitions */ +#ifdef CONFIG_MTD_PARTITIONS + +static struct mtd_partition nand_flash_partitions[] = { + { + .name = "nand.bootloader", + .offset = 0, + .size = 512 * 1024}, + { + .name = "nand.bootenv", + .offset = MTDPART_OFS_APPEND, + .size = 512 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 4 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; + +#endif + +#if defined(CONFIG_MTD_NAND_MXC_V3) || defined(CONFIG_MTD_NAND_MXC_V3_MODULE) +static int nand_init(void) +{ + /* Configure the pins */ + return 0; +} + +static void nand_exit(void) +{ + /* Free the pins */ + ; +} + +static struct flash_platform_data mxc_nand_data = { + .name = "vmx_nand", +#ifdef CONFIG_MTD_PARTITIONS + .parts = nand_flash_partitions, + .nr_parts = ARRAY_SIZE(nand_flash_partitions), +#endif // CONFIG_MTD_PARTITIONS + .width = 1, + .init = nand_init, + .exit = nand_exit, +}; +#endif // CONFIG_MTD_NAND_MXC_V3 + +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition mxc_spi_bbflash_partitions[] = { + { + .name = "spi.bbboot", + .offset = 0, + .size = 0x00040000, + .mask_flags = MTD_CAP_ROM, + }, + { + .name = "spi.bbkernel", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct mtd_partition mxc_spi_moflash_partitions[] = { + { + .name = "spi.moboot", + .offset = 0, + .size = 0x00040000, + .mask_flags = MTD_CAP_ROM, + }, + { + .name = "spi.mokernel", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; +#endif + +static struct spi_flash_platform_data mxc_spi_bbflash_data = { +//static struct flash_platform_data mxc_spi_bbflash_data = { + .name = "m25p80", +#ifdef CONFIG_MTD_PARTITIONS + .parts = mxc_spi_bbflash_partitions, + .nr_parts = ARRAY_SIZE(mxc_spi_bbflash_partitions), +#endif + .type = "sst25vf032b", +}; + +static struct spi_flash_platform_data mxc_spi_moflash_data = { +//static struct flash_platform_data mxc_spi_moflash_data = { + .name = "m25p80", +#ifdef CONFIG_MTD_PARTITIONS + .parts = mxc_spi_moflash_partitions, + .nr_parts = ARRAY_SIZE(mxc_spi_moflash_partitions), +#endif + .type = "sst26vf032b", +}; +#endif // CONFIG_MTD_M25P80 +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) +static int ads7846_get_pendown_state(void) +{ + return !gpio_get_value(VMX53_TSC2046_IRQ); +} + +static struct ads7846_platform_data ads7846_config __initdata = { + .model = 7846, + .vref_delay_usecs = 100, + .x_plate_ohms = 300, + .y_plate_ohms = 600, + /* debounce Filter */ + .debounce_max = 10, /* max number of additional readings per sample */ + .debounce_rep = 1, /* additional consecutive good readings required after the first two */ + .debounce_tol = 5, /* tolerance used for filtering */ + + .get_pendown_state = ads7846_get_pendown_state, + .keep_vref_on = 0, + .vref_mv = 0, +}; +#endif // CONFIG_TOUCHSCREEN_ADS7846 + +#if defined(CONFIG_CAN_MCP251X) || defined(CONFIG_CAN_MCP251X_MODULE) +static struct mcp251x_platform_data mcp251x_config = { + .oscillator_frequency = 16000000, + .model = CAN_MCP251X_MCP2515, + .board_specific_setup = NULL, + .power_enable = NULL, + .transceiver_enable = NULL, +}; +#endif // CONFIG_CAN_MCP251X + +static struct spi_board_info mxc_ecspi1_board_info[] __initdata = { +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) + { + .modalias = "m25p80", + .bus_num = 0, + .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ + .chip_select = 0, + .platform_data = &mxc_spi_bbflash_data, + .mode = SPI_MODE_0, + }, + { + .modalias = "m25p80", + .bus_num = 0, + .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ + .chip_select = 1, + .platform_data = &mxc_spi_moflash_data, + .mode = SPI_MODE_0, + }, +#endif // CONFIG_MTD_M25P80 +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) + { + .modalias = "ads7846", // MASU FIXME regulator + .bus_num = 0, + .max_speed_hz = (125000 * 26), /* AD speed x (cmd + sample + before, after)*/ + .irq = gpio_to_irq(VMX53_TSC2046_IRQ), + .chip_select = 2, + .platform_data = &ads7846_config, + .mode = SPI_MODE_2, + }, +#endif // CONFIG_TOUCHSCREEN_ADS7846 +#if defined(CONFIG_CAN_MCP251X) || defined(CONFIG_CAN_MCP251X_MODULE) + { + .modalias = "mcp251x", + .bus_num = 0, + .max_speed_hz = 10000000, + .irq = gpio_to_irq(VMX53_MCP2515_IRQ), + .chip_select = 3, + .platform_data = &mcp251x_config, + .mode = SPI_MODE_0, + }, +#endif // CONFIG_CAN_MCP251X +}; + +static int vmx53_spi_cs[] = { + VMX53_ECSPI1_CS0, + VMX53_ECSPI1_CS1, + VMX53_TSC2046_CS, + VMX53_MCP2515_CS, +}; + +static struct spi_imx_master vmx53_spi_pdata = { + .chipselect = vmx53_spi_cs, + .num_chipselect = ARRAY_SIZE(vmx53_spi_cs), +}; + + +static struct imxi2c_platform_data mxci2c_data = { +// .bitrate = 100000, + .bitrate = 400000, +}; + +static struct at24_platform_data module_eeprom = { + .byte_len = SZ_512K / 8, + .page_size = 128, + .flags = AT24_FLAG_ADDR16, +}; + +static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { + { + .type = "mma845x", + .addr = 0x1c, + }, + { + .type = "24c512", + .addr = 0x56, + .platform_data = &module_eeprom, + }, +}; + +static struct at24_platform_data bboard_eeprom = { + .byte_len = SZ_512K / 8, + .page_size = 128, + .flags = AT24_FLAG_ADDR16, +}; + +#define FT5X06_IRQ IMX_GPIO_NR(4, 5) +//#define FT5X06_RESET VMX53_RESET_OUT + +static struct edt_ft5x06_platform_data edt_ft5x06 = { + .irq_pin = FT5X06_IRQ, +// .reset_pin = FT5X06_RESET, + .reset_pin = -1, + .use_parameters = false, +// .gain = 7, +// .threshold = 40, +// .offset = 0, +// .report_rate = 8, +}; + +#define GPIO_SI4705_IRQ IMX_GPIO_NR(3, 27) + +static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { + { + .type = "sgtl5000-i2c", + .addr = 0x0a, + }, + { + .type = "edt-ft5x06", + .addr = 0x38, + .irq = gpio_to_irq(FT5X06_IRQ), + .platform_data = &edt_ft5x06, + }, + { + .type = "radio-si4705", + .addr = 0x63, + .irq = gpio_to_irq(GPIO_SI4705_IRQ), + }, + { + .type = "24c512", + .addr = 0x57, + .platform_data = &bboard_eeprom, + }, + { + .type = "ds1339", + .addr = 0x68, + }, +// { +// .type = "sii902x", +// .addr = 0x39, +// .irq = gpio_to_irq(DISP0_DET_INT), +// .platform_data = &sii902x_hdmi_data, +// }, +}; + +static int radio_si4705_reset(void) { + int err = 0; + + err |= gpio_request(VMX53_RESET_OUT, "VMX53_RESET_OUT"); + err |= gpio_request(GPIO_SI4705_IRQ, "GPIO_SI4705_IRQ"); + + if (err) + return err; + + gpio_direction_output(VMX53_RESET_OUT, 0); + gpio_direction_output(GPIO_SI4705_IRQ, 0); + + mdelay(50); + + gpio_set_value(VMX53_RESET_OUT, 1); + gpio_direction_input(GPIO_SI4705_IRQ); + + gpio_free(GPIO_SI4705_IRQ); + + return 0; +} + +#if 0 +static int p1003_ts_hw_status(void) +{ + return gpio_get_value(DISP0_DET_INT); +} + +static struct p1003_ts_platform_data p1003_ts_data = { + .hw_status = p1003_ts_hw_status, +}; + +static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { + { + .type = "p1003_fwv33", + .addr = 0x41, + .irq = gpio_to_irq(DISP0_DET_INT), + .platform_data = &p1003_ts_data, + }, + { + .type = "egalax_ts", + .addr = 0x4, + .irq = gpio_to_irq(DISP0_DET_INT), + }, +}; +#endif +static int sdhc_write_protect(struct device *dev) +{ + int ret = 0; + + if (to_platform_device(dev)->id == 0) + ; // WP pin not available + else + ret = gpio_get_value(VMX53_SD2_WP); + + return ret; +} + +static unsigned int sdhc_get_card_det_status(struct device *dev) +{ + int ret = 0; + + if (to_platform_device(dev)->id == 0) + ret = gpio_get_value(VMX53_SD1_CD); + else + ret = gpio_get_value(VMX53_SD2_CD); + + return ret; +} + +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 + | MMC_VDD_31_32, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 400000, + .max_clk = 50000000, + .card_inserted_state = 1, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", + .power_mmc = NULL, +}; + +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 + | MMC_VDD_31_32, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 400000, + .max_clk = 50000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", + .power_mmc = NULL, +}; + +static int mxc_sgtl5000_amp_enable(int enable) +{ + return 0; +} + +static int mxc_sgtl5000_clock_enable(int enable) +{ + return 0; +} + +static int headphone_det_status(void) +{ + return 0; +} +//static int headphone_det_status(void) +//{ +// return (gpio_get_value(HEADPHONE_DEC_B) == 0); +//} + +//static int mxc_sgtl5000_init(void); + +static struct mxc_audio_platform_data sgtl5000_data = { + .ssi_num = 1, + .src_port = 2, + .ext_port = 5, +// .hp_irq = gpio_to_irq(HEADPHONE_DEC_B), + .hp_status = headphone_det_status, + .amp_enable = mxc_sgtl5000_amp_enable, + .clock_enable = mxc_sgtl5000_clock_enable, +// .init = mxc_sgtl5000_init, + .sysclk = 12288000, + .ext_ram_rx = 1, +}; +#if 0 +static int mxc_sgtl5000_init(void) +{ + struct clk *ssi_ext1; + int rate; + + ssi_ext1 = clk_get(NULL, "ssi_ext1_clk"); + if (IS_ERR(ssi_ext1)) + return -1; + + rate = clk_round_rate(ssi_ext1, 24000000); + if (rate < 8000000 || rate > 27000000) { + printk(KERN_ERR "Error: SGTL5000 mclk freq %d out of range!\n", + rate); + clk_put(ssi_ext1); + return -1; + } + + clk_set_rate(ssi_ext1, rate); + clk_enable(ssi_ext1); + sgtl5000_data.sysclk = rate; + + return 0; +} +#endif +static struct platform_device mxc_sgtl5000_device = { + .name = "imx-3stack-sgtl5000", +}; + +static struct android_pmem_platform_data android_pmem_data = { + .name = "pmem_adsp", + .size = SZ_32M, +}; + +static struct android_pmem_platform_data android_pmem_gpu_data = { + .name = "pmem_gpu", + .size = SZ_64M, + .cached = 1, +}; + +static char *usb_functions_ums[] = { + "usb_mass_storage", +}; + +static char *usb_functions_ums_adb[] = { + "usb_mass_storage", + "adb", +}; + +static char *usb_functions_rndis[] = { + "rndis", +}; + +static char *usb_functions_rndis_adb[] = { + "rndis", + "adb", +}; + +static char *usb_functions_all[] = { + "rndis", + "usb_mass_storage", + "adb" +}; + +static struct android_usb_product usb_products[] = { + { + .product_id = 0x0c01, + .num_functions = ARRAY_SIZE(usb_functions_ums), + .functions = usb_functions_ums, + }, + { + .product_id = 0x0c02, + .num_functions = ARRAY_SIZE(usb_functions_ums_adb), + .functions = usb_functions_ums_adb, + }, + { + .product_id = 0x0c10, + .num_functions = ARRAY_SIZE(usb_functions_rndis), + .functions = usb_functions_rndis, + }, + +}; + +static struct usb_mass_storage_platform_data mass_storage_data = { + .nluns = 3, + .vendor = "Freescale", + .product = "MX53 QS Android Phone", + .release = 0x0100, +}; + +static struct usb_ether_platform_data rndis_data = { + .vendorID = 0x15a2, + .vendorDescr = "Freescale", +}; + +static struct android_usb_platform_data android_usb_data = { + .vendor_id = 0x15a2, + .product_id = 0x0c01, + .version = 0x0100, + .product_name = "MX53 QS Android Phone", + .manufacturer_name = "Freescale", + .num_products = ARRAY_SIZE(usb_products), + .products = usb_products, + .num_functions = ARRAY_SIZE(usb_functions_all), + .functions = usb_functions_all, +}; + +static struct mxc_asrc_platform_data mxc_asrc_data = { + .channel_bits = 4, + .clk_map_ver = 2, +}; + +static struct mxc_spdif_platform_data mxc_spdif_data = { + .spdif_tx = 1, + .spdif_rx = 0, + .spdif_clk_44100 = -1, /* Souce from CKIH1 for 44.1K */ + /* Source from CCM spdif_clk (24M) for 48k and 32k + * It's not accurate + */ + .spdif_clk_48000 = 1, + .spdif_clkid = 0, + .spdif_clk = NULL, /* spdif bus clk */ +}; + +static struct mxc_audio_platform_data spdif_audio_data = { + .ext_ram_tx = 1, +}; + +static struct platform_device mxc_spdif_audio_device = { + .name = "imx-spdif-audio-device", +}; + +static void mx53_loco_usbh1_vbus(bool on) +{ + gpio_set_value(VMX53_USBH1_PEN, (on)? 1 : 0); +} + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ +{ \ + .gpio = gpio_num, \ + .type = EV_KEY, \ + .code = ev_code, \ + .active_low = act_low, \ + .desc = "btn " descr, \ + .wakeup = wake, \ +} + +static struct gpio_keys_button loco_buttons[] = { + GPIO_BUTTON(VMX53_nONKEY, KEY_POWER, 1, "power", 0), +// GPIO_BUTTON(USER_UI1, KEY_VOLUMEUP, 1, "volume-up", 0), +// GPIO_BUTTON(USER_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0), +}; + +static struct gpio_keys_platform_data loco_button_data = { + .buttons = loco_buttons, + .nbuttons = ARRAY_SIZE(loco_buttons), +}; + +static struct platform_device loco_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &loco_button_data, + } +}; + +static void __init loco_add_device_buttons(void) +{ + platform_device_register(&loco_button_device); +} +#else +static void __init loco_add_device_buttons(void) {} +#endif + +static u16 keymapping[64] = { + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_ZOOM, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_MENU, + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_BACK, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_HOME, + KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, +}; + +static struct keypad_data keypad_plat_data = { + .rowmax = 8, + .colmax = 8, + .learning = 0, + .delay = 2, + .matrix = keymapping, +}; + +static struct gpio_led vmx_leds[] = { + { + .name = "red", + .default_trigger = "heartbeat", + .gpio = VMX53_LED_RED, + }, + { + .name = "orange", + .default_trigger = "none", + .gpio = VMX53_LED_ORANGE, + .default_state = LEDS_GPIO_DEFSTATE_ON, + } +}; + +static struct gpio_led_platform_data vmx_led_data = { + .leds = vmx_leds, + .num_leds = ARRAY_SIZE(vmx_leds), +}; + +static struct platform_device vmx_led_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &vmx_led_data, + }, +}; + +#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) +static struct imxuart_platform_data uart1_pdata = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +static struct imxuart_platform_data uart2_pdata = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +static struct imxuart_platform_data uart3_pdata = { + .flags = IMXUART_HAVE_RTSCTS, +}; +#endif // CONFIG_SERIAL_IMX + +static struct mxc_w1_config mxc_w1_data = { + .search_rom_accelerator = 1, +}; +#if 0 +static void mxc_register_powerkey(pwrkey_callback pk_cb) +{ + pmic_event_callback_t power_key_event; + + power_key_event.param = (void *)1; + power_key_event.func = (void *)pk_cb; + pmic_event_subscribe(EVENT_PWRONI, power_key_event); + + power_key_event.param = (void *)3; + pmic_event_subscribe(EVENT_PWRON3I, power_key_event); +} + +static int mxc_pwrkey_getstatus(int id) +{ + int sense; + + pmic_read_reg(REG_INT_SENSE1, &sense, 0xffffffff); + if (sense & (1 << 3)) + return 0; + + return 1; +} + +static struct power_key_platform_data pwrkey_data = { + .key_value = KEY_F4, + .register_pwrkey = mxc_register_powerkey, + .get_key_status = mxc_pwrkey_getstatus, +}; +#endif +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + struct tag *t; + struct tag *mem_tag = 0; + int total_mem = SZ_1G; + int left_mem = 0; + int gpu_mem = SZ_128M; + int fb_mem = SZ_32M; + char *str; + + mxc_set_cpu_type(MXC_CPU_MX53); + + for_each_tag(mem_tag, tags) { + if (mem_tag->hdr.tag == ATAG_MEM) { + total_mem = mem_tag->u.mem.size; + break; + } + } + + for_each_tag(t, tags) { + if (t->hdr.tag == ATAG_CMDLINE) { + str = t->u.cmdline.cmdline; + str = strstr(str, "mem="); + if (str != NULL) { + str += 4; + left_mem = memparse(str, &str); + } + + str = t->u.cmdline.cmdline; + str = strstr(str, "gpu_nommu"); + if (str != NULL) + gpu_data.enable_mmu = 0; + + str = t->u.cmdline.cmdline; + str = strstr(str, "gpu_memory="); + if (str != NULL) { + str += 11; + gpu_mem = memparse(str, &str); + } + + break; + } + } + + if (gpu_data.enable_mmu) + gpu_mem = 0; + + if (left_mem == 0 || left_mem > total_mem) + left_mem = total_mem - gpu_mem - fb_mem; + + if (mem_tag) { + fb_mem = total_mem - left_mem - gpu_mem; + if (fb_mem < 0) { + gpu_mem = total_mem - left_mem; + fb_mem = 0; + } + mem_tag->u.mem.size = left_mem; + + /*reserve memory for gpu*/ + if (!gpu_data.enable_mmu) { + gpu_device.resource[5].start = + mem_tag->u.mem.start + left_mem; + gpu_device.resource[5].end = + gpu_device.resource[5].start + gpu_mem - 1; + } +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || \ + defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) + if (fb_mem) { + mxcfb_resources[0].start = + gpu_data.enable_mmu ? + mem_tag->u.mem.start + left_mem : + gpu_device.resource[5].end + 1; + mxcfb_resources[0].end = + mxcfb_resources[0].start + fb_mem - 1; + } else { + mxcfb_resources[0].start = 0; + mxcfb_resources[0].end = 0; + } +#endif + } +} + +static void __init mx53_loco_io_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, + ARRAY_SIZE(mx53_loco_pads)); + + radio_si4705_reset(); + + // SD/MMC + gpio_request(VMX53_SD1_SEL, "sd1-sel"); + gpio_direction_output(VMX53_SD1_SEL, 1); // 0 = module, 1 = baseboard + + gpio_request(VMX53_SD1_CD, "sd1-cd"); + gpio_direction_input(VMX53_SD1_CD); + + gpio_request(VMX53_SD2_CD, "sd2-cd"); + gpio_direction_input(VMX53_SD2_CD); + + gpio_request(VMX53_SD2_WP, "sd2-wp"); + gpio_direction_input(VMX53_SD2_WP); + + // FEC PHY + gpio_request(VMX53_FEC_RST, "fec-rst"); + gpio_direction_output(VMX53_FEC_RST, 0); + gpio_set_value(VMX53_FEC_RST, 0); + msleep(1); + gpio_set_value(VMX53_FEC_RST, 1); + + // LCD PEN + gpio_request(VMX53_DISP0_PEN, "disp0-power-en"); + gpio_direction_output(VMX53_DISP0_PEN, 1); + + // I2C_INT + gpio_request(VMX53_I2C_INT, "i2c-int"); + gpio_direction_input(VMX53_I2C_INT); + + // Touch INT + gpio_request(VMX53_TSC2046_IRQ, "touch-irq"); + gpio_direction_input(VMX53_TSC2046_IRQ); + + // USB + gpio_request(VMX53_USBH1_OC, "usbh1-oc"); + gpio_direction_input(VMX53_USBH1_OC); + + gpio_request(VMX53_USBH1_PEN, "usbh1-pwr"); + gpio_direction_output(VMX53_USBH1_PEN, 0); + + gpio_request(VMX53_USBO_OC, "usbo-oc"); + gpio_direction_input(VMX53_USBO_OC); + + gpio_request(VMX53_USBO_PEN, "usbo-pwr"); + gpio_direction_output(VMX53_USBO_PEN, 0); +} + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + +// iomux_v3_cfg_t mc34708_int = MX53_PAD_CSI0_DAT12__GPIO5_30; + iomux_v3_cfg_t da9052_csi0_d12; + + mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk"); + mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk"); + mxc_ipu_data.csi_clk[0] = clk_get(NULL, "ssi_ext1_clk"); + mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk"); + clk_put(mxc_spdif_data.spdif_core_clk); + + mxcsdhc1_device.resource[2].start = gpio_to_irq(VMX53_SD1_CD); + mxcsdhc1_device.resource[2].end = gpio_to_irq(VMX53_SD1_CD); + mxcsdhc2_device.resource[2].start = gpio_to_irq(VMX53_SD2_CD); + mxcsdhc2_device.resource[2].end = gpio_to_irq(VMX53_SD2_CD); + + mxc_cpu_common_init(); + mx53_loco_io_init(); + + mxc_register_device(&mxc_dma_device, NULL); + mxc_register_device(&mxc_wdt_device, NULL); +#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) + mxc_register_device(&mxcuart_devices[0], &uart1_pdata); + mxc_register_device(&mxcuart_devices[1], &uart2_pdata); + mxc_register_device(&mxcuart_devices[2], &uart3_pdata); +#endif // CONFIG_SERIAL_IMX + mxc_register_device(&mxcspi1_device, &vmx53_spi_pdata); + mxc_register_device(&mxci2c_devices[0], &mxci2c_data); +// mxc_register_device(&mxci2c_devices[1], &mxci2c_data); + mxc_register_device(&mxci2c_devices[2], &mxci2c_data); +#if 0 + if (board_is_mx53_loco_mc34708()) { + /* set pmic INT gpio pin */ + if (board_is_rev(BOARD_REV_2)) {/*Board rev A*/ + mc34708_int = MX53_PAD_CSI0_DAT12__GPIO5_30; + mx53_loco_mc34708_irq = MX53_LOCO_MC34708_IRQ_REVA; + } else if (board_is_rev(BOARD_REV_4)) {/*Board rev B*/ + mc34708_int = MX53_PAD_CSI0_DAT5__GPIO5_23; + mx53_loco_mc34708_irq = MX53_LOCO_MC34708_IRQ_REVB; + } + mxc_iomux_v3_setup_pad(mc34708_int); + gpio_request(mx53_loco_mc34708_irq, "pmic-int"); + gpio_direction_input(mx53_loco_mc34708_irq); + mx53_loco_init_mc34708(mx53_loco_mc34708_irq); + dvfs_core_data.reg_id = "SW1A"; + tve_data.dac_reg = "VDAC"; + bus_freq_data.gp_reg_id = "SW1A"; + bus_freq_data.lp_reg_id = "SW2"; + mxc_register_device(&mxc_powerkey_device, &pwrkey_data); + } + else +#endif + { + da9052_csi0_d12 = MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12; + mxc_iomux_v3_setup_pad(da9052_csi0_d12); + mx53_loco_init_da9052(); + dvfs_core_data.reg_id = "DA9052_BUCK_CORE"; + tve_data.dac_reg = "DA9052_LDO7"; + bus_freq_data.gp_reg_id = "DA9052_BUCK_CORE"; + bus_freq_data.lp_reg_id = "DA9052_BUCK_PRO"; + } + + mxc_register_device(&mxc_rtc_device, NULL); + mxc_register_device(&mxc_w1_master_device, &mxc_w1_data); + mxc_register_device(&mxc_ipu_device, &mxc_ipu_data); + mxc_register_device(&mxc_ldb_device, &ldb_data); + mxc_register_device(&mxc_tve_device, &tve_data); + if (!mxc_fuse_get_vpu_status()) + mxc_register_device(&mxcvpu_device, &mxc_vpu_data); + if (!mxc_fuse_get_gpu_status()) + mxc_register_device(&gpu_device, &gpu_data); + mxc_register_device(&mxcscc_device, NULL); + mxc_register_device(&pm_device, &loco_pm_data); + mxc_register_device(&mxc_dvfs_core_device, &dvfs_core_data); + mxc_register_device(&busfreq_device, &bus_freq_data); + mxc_register_device(&mxc_iim_device, &iim_data); + mxc_register_device(&mxc_pwm2_device, NULL); + mxc_register_device(&mxc_pwm1_backlight_device, &mxc_pwm_backlight_data); +// mxc_register_device(&mxc_flexcan0_device, &flexcan0_data); + mxc_register_device(&mxc_flexcan1_device, &flexcan1_data); + mxc_register_device(&mxc_keypad_device, &keypad_plat_data); + mxc_register_device(&mxcsdhc1_device, &mmc1_data); + mxc_register_device(&mxcsdhc2_device, &mmc2_data); + mxc_register_device(&mxc_ssi1_device, NULL); + mxc_register_device(&mxc_ssi2_device, NULL); + mxc_register_device(&mxc_alsa_spdif_device, &mxc_spdif_data); + mxc_register_device(&mxc_android_pmem_device, &android_pmem_data); + mxc_register_device(&mxc_android_pmem_gpu_device, + &android_pmem_gpu_data); + mxc_register_device(&usb_mass_storage_device, &mass_storage_data); + mxc_register_device(&usb_rndis_device, &rndis_data); + mxc_register_device(&android_usb_device, &android_usb_data); + mxc_register_device(&ahci_fsl_device, &sata_data); + mxc_register_device(&mxc_fec_device, &fec_data); + mxc_register_device(&mxc_ptp_device, NULL); + platform_device_register(&vmx_led_device); + /* ASRC is only available for MX53 TO2.0 */ + if (mx53_revision() >= IMX_CHIP_REVISION_2_0) { + mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk"); + clk_put(mxc_asrc_data.asrc_core_clk); + mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk"); + clk_put(mxc_asrc_data.asrc_audio_clk); + mxc_register_device(&mxc_asrc_device, &mxc_asrc_data); + } + +#if defined(CONFIG_MTD_NAND_MXC_V3) || defined(CONFIG_MTD_NAND_MXC_V3_MODULE) // fsl driver + mxc_register_device(&mxc_nandv2_mtd_device, &mxc_nand_data); +#endif + + spi_register_board_info(mxc_ecspi1_board_info, + ARRAY_SIZE(mxc_ecspi1_board_info)); + i2c_register_board_info(0, mxc_i2c0_board_info, + ARRAY_SIZE(mxc_i2c0_board_info)); +// i2c_register_board_info(1, mxc_i2c1_board_info, +// ARRAY_SIZE(mxc_i2c1_board_info)); + i2c_register_board_info(2, mxc_i2c2_board_info, + ARRAY_SIZE(mxc_i2c2_board_info)); + + sgtl5000_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk"); + clk_put(sgtl5000_data.ext_ram_clk); + mxc_register_device(&mxc_sgtl5000_device, &sgtl5000_data); + + spdif_audio_data.ext_ram_clk = clk_get(NULL, "emi_fast_clk"); + clk_put(spdif_audio_data.ext_ram_clk); + mxc_register_device(&mxc_spdif_audio_device, &spdif_audio_data); + + mx5_usb_dr_init(); + mx5_set_host1_vbus_func(mx53_loco_usbh1_vbus); + mx5_usbh1_init(); + mxc_register_device(&mxc_v4l2_device, NULL); + mxc_register_device(&mxc_v4l2out_device, NULL); + loco_add_device_buttons(); + pm_power_off = da9053_power_off; + pm_i2c_init(I2C1_BASE_ADDR - MX53_OFFSET); +} + +static void __init mx53_loco_timer_init(void) +{ + struct clk *uart_clk; + + mx53_clocks_init(32768, 24000000, 0, 0); + + uart_clk = clk_get_sys("mxcintuart.0", NULL); + early_console_setup(MX53_BASE_ADDR(UART1_BASE_ADDR), uart_clk); +} + +static struct sys_timer mxc_timer = { + .init = mx53_loco_timer_init, +}; + +static void __init fixup_android_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + char *str; + struct tag *t; + struct tag *mem_tag = 0, *last_mem_tag = 0; +// int total_mem = SZ_1G; + unsigned long total_mem = 0; + unsigned long left_mem = 0, avali_mem = 0; + int gpu_mem = SZ_64M; + int pmem_gpu_size = android_pmem_gpu_data.size; + int pmem_adsp_size = android_pmem_data.size; + + mxc_set_cpu_type(MXC_CPU_MX53); + + /* get mem= and gpu_memory= from cmdline */ + for_each_tag(t, tags) { + if (t->hdr.tag == ATAG_CMDLINE) { + str = t->u.cmdline.cmdline; + str = strstr(str, "mem="); + if (str != NULL) { + str += 4; + avali_mem = memparse(str, &str); + } + + str = t->u.cmdline.cmdline; + str = strstr(str, "gpu_nommu"); + if (str != NULL) + gpu_data.enable_mmu = 0; + + str = t->u.cmdline.cmdline; + str = strstr(str, "gpu_memory="); + if (str != NULL) { + str += 11; + gpu_mem = memparse(str, &str); + } + break; + } + } + + if (gpu_data.enable_mmu) + gpu_mem = 0; + /* get total memory from TAGS */ + for_each_tag(mem_tag, tags) { + if (mem_tag->hdr.tag == ATAG_MEM) { +printk("ATAG_MEM: start=%08x, size=%u\n",mem_tag->u.mem.start,mem_tag->u.mem.size); + last_mem_tag = mem_tag; +// break; + } + } + +//printk("total_mem=%u, left_mem=%u, gpu_mem=%d, pmem_gpu_size=%d, pmem_adsp_size=%d\n", +// total_mem, left_mem, gpu_mem, pmem_gpu_size, pmem_adsp_size); + +// if (avali_mem > 0 && avali_mem < left_mem) +// left_mem = avali_mem; + + if (last_mem_tag) { + mem_tag = last_mem_tag; + + total_mem = mem_tag->u.mem.size; + left_mem = total_mem - gpu_mem - pmem_gpu_size - pmem_adsp_size; + + android_pmem_data.start = mem_tag->u.mem.start + + left_mem + gpu_mem + pmem_gpu_size; + android_pmem_gpu_data.start = mem_tag->u.mem.start + + left_mem + gpu_mem; + mem_tag->u.mem.size = left_mem; +//printk("android_pmem_data.start=%08lx (%08x+%08x+%08x+%08x)\n", +// android_pmem_data.start,mem_tag->u.mem.start,left_mem,gpu_mem,pmem_gpu_size); +//printk("android_pmem_gpu_data.start=%08lx (%08x+%08x+%08x)\n",android_pmem_gpu_data.start, +// mem_tag->u.mem.start,left_mem,gpu_mem); + /*reserve memory for gpu*/ + if (!gpu_data.enable_mmu) { + gpu_device.resource[5].start = + mem_tag->u.mem.start + left_mem; + gpu_device.resource[5].end = + gpu_device.resource[5].start + gpu_mem - 1; +//printk("gpu_device.resource[5].start=%08x, (%08x+%08x)\n", +// gpu_device.resource[5].start,mem_tag->u.mem.start,left_mem); +//printk("gpu_device.resource[5].end=%08x\n",gpu_device.resource[5].end); + } + } +} + +/* + * The following uses standard kernel macros define in arch.h in order to + * initialize __mach_desc_MX53_LOCO data structure. + */ +//MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board") +MACHINE_START(VMX53, "Voipac Technologies VMX53 Board") + /* Maintainer: Voipac Technologies */ +#ifdef CONFIG_ANDROID_PMEM + .fixup = fixup_android_board, +#else + .fixup = fixup_mxc_board, +#endif + .map_io = mx5_map_io, + .init_irq = mx5_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END diff -urN linux-2.6.35.3.fsl/arch/arm/plat-mxc/ahci_sata.c linux-2.6.35.3.work/arch/arm/plat-mxc/ahci_sata.c --- linux-2.6.35.3.fsl/arch/arm/plat-mxc/ahci_sata.c 2015-11-23 20:06:25.543833713 +0100 +++ linux-2.6.35.3.work/arch/arm/plat-mxc/ahci_sata.c 2015-11-22 16:44:14.967616903 +0100 @@ -403,7 +403,7 @@ writel(tmpdata, mmio + HOST_TIMER1MS); - if (machine_is_mx53_smd() || machine_is_mx53_loco() + if (machine_is_mx53_smd() || machine_is_mx53_loco() || machine_is_vmx53() || board_is_mx53_ard_b()) { /* FSL IMX AHCI SATA uses the internal usb phy1 clk */ sata_ref_clk = clk_get(NULL, "usb_phy1_clk"); @@ -487,7 +487,7 @@ /* Release resources when there is no device on the port */ if ((readl(mmio + PORT_SATA_SR) & 0xF) == 0) { ret = -ENODEV; - if (machine_is_mx53_smd() || machine_is_mx53_loco() + if (machine_is_mx53_smd() || machine_is_mx53_loco() || machine_is_vmx53() || board_is_mx53_ard_b()) goto no_device; else @@ -519,7 +519,7 @@ static void sata_exit(struct device *dev) { sysfs_remove_group(&dev->kobj, &fsl_sata_ahci_group); - if (machine_is_mx53_smd() || machine_is_mx53_loco() + if (machine_is_mx53_smd() || machine_is_mx53_loco() || machine_is_vmx53() || board_is_mx53_ard_b()) { /* FSL IMX AHCI SATA uses the internal usb phy1 clk */ clk_disable(sata_ref_clk); diff -urN linux-2.6.35.3.fsl/arch/arm/tools/mach-types linux-2.6.35.3.work/arch/arm/tools/mach-types --- linux-2.6.35.3.fsl/arch/arm/tools/mach-types 2015-11-23 20:06:25.575833713 +0100 +++ linux-2.6.35.3.work/arch/arm/tools/mach-types 2015-11-22 16:44:14.971616903 +0100 @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Thu Dec 30 02:31:56 2010 +# Last update: Mon Feb 27 02:59:18 2012 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -1558,7 +1558,7 @@ davinci_ldk MACH_DAVINCI_LDK DAVINCI_LDK 1562 phreedom MACH_PHREEDOM PHREEDOM 1563 sg310 MACH_SG310 SG310 1564 -ts_x09 MACH_TS209 TS209 1565 +ts209 MACH_TS209 TS209 1565 at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 tion9315 MACH_TION9315 TION9315 1567 mast MACH_MAST MAST 1568 @@ -1777,7 +1777,6 @@ sg560adsl MACH_SG560ADSL SG560ADSL 1786 nextio_n2800_ica MACH_NEXTIO_N2800_ICA NEXTIO_N2800_ICA 1787 dove_db MACH_DOVE_DB DOVE_DB 1788 -dove_avng MACH_MARVELL_NEWDB MARVELL_NEWDB 1789 vandihud MACH_VANDIHUD VANDIHUD 1790 magx_e8 MACH_MAGX_E8 MAGX_E8 1791 magx_z6 MACH_MAGX_Z6 MAGX_Z6 1792 @@ -1877,7 +1876,6 @@ esiblade MACH_ESIBLADE ESIBLADE 1886 eye02 MACH_EYE02 EYE02 1887 imx27kbd MACH_IMX27KBD IMX27KBD 1888 -p87_fpga MACH_SST61VC010_FPGA SST61VC010_FPGA 1889 kixvp435 MACH_KIXVP435 KIXVP435 1890 kixnp435 MACH_KIXNP435 KIXNP435 1891 africa MACH_AFRICA AFRICA 1892 @@ -1963,7 +1961,7 @@ arm11 MACH_ARM11 ARM11 1972 cpuat9260 MACH_CPUAT9260 CPUAT9260 1973 cpupxa255 MACH_CPUPXA255 CPUPXA255 1974 -eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975 +eukrea_cpuimx27 MACH_EUKREA_CPUIMX27 EUKREA_CPUIMX27 1975 cheflux MACH_CHEFLUX CHEFLUX 1976 eb_cpux9k2 MACH_EB_CPUX9K2 EB_CPUX9K2 1977 opcotec MACH_OPCOTEC OPCOTEC 1978 @@ -2240,7 +2238,7 @@ vs_v210 MACH_VS_V210 VS_V210 2252 vs_v212 MACH_VS_V212 VS_V212 2253 hmt MACH_HMT HMT 2254 -suen3 MACH_SUEN3 SUEN3 2255 +km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255 vesper MACH_VESPER VESPER 2256 str9 MACH_STR9 STR9 2257 omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258 @@ -2308,7 +2306,6 @@ tazkiosk MACH_TAZKIOSK TAZKIOSK 2320 whiterabbit_mch MACH_WHITERABBIT_MCH WHITERABBIT_MCH 2321 sbox9263 MACH_SBOX9263 SBOX9263 2322 -oreo_camera MACH_OREO OREO 2323 smdk6442 MACH_SMDK6442 SMDK6442 2324 openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325 incredible MACH_INCREDIBLE INCREDIBLE 2326 @@ -2374,7 +2371,6 @@ rbl01 MACH_RBL01 RBL01 2387 omnifi MACH_OMNIFI OMNIFI 2388 otavalo MACH_OTAVALO OTAVALO 2389 -siena MACH_SIENNA SIENNA 2390 htc_excalibur_s620 MACH_HTC_EXCALIBUR_S620 HTC_EXCALIBUR_S620 2391 htc_opal MACH_HTC_OPAL HTC_OPAL 2392 touchbook MACH_TOUCHBOOK TOUCHBOOK 2393 @@ -2446,7 +2442,6 @@ siogentoo2 MACH_SIOGENTOO2 SIOGENTOO2 2459 sm3k MACH_SM3K SM3K 2460 acer_tempo_f900 MACH_ACER_TEMPO_F900 ACER_TEMPO_F900 2461 -p87_dev MACH_SST61VC010_DEV SST61VC010_DEV 2462 glittertind MACH_GLITTERTIND GLITTERTIND 2463 omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465 @@ -2498,7 +2493,6 @@ phy3250 MACH_PHY3250 PHY3250 2511 ea3250 MACH_EA3250 EA3250 2512 fdi3250 MACH_FDI3250 FDI3250 2513 -htcwhitestone MACH_WHITESTONE WHITESTONE 2514 at91sam9263nit MACH_AT91SAM9263NIT AT91SAM9263NIT 2515 ccmx51 MACH_CCMX51 CCMX51 2516 ccmx51js MACH_CCMX51JS CCMX51JS 2517 @@ -2575,14 +2569,13 @@ dlt2 MACH_DLT2 DLT2 2588 df3120 MACH_DF3120 DF3120 2589 ecucore_9g20 MACH_ECUCORE_9G20 ECUCORE_9G20 2590 -nautel_lpc3240 MACH_NAUTEL_LPC3240 NAUTEL_LPC3240 2591 +nautel_am35xx MACH_NAUTEL_LPC3240 NAUTEL_LPC3240 2591 glacier MACH_GLACIER GLACIER 2592 phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593 omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594 pca101 MACH_PCA101 PCA101 2595 buzzc MACH_BUZZC BUZZC 2596 sasie2 MACH_SASIE2 SASIE2 2597 -davinci_dm6467_cio MACH_DAVINCI_CIO DAVINCI_CIO 2598 smartmeter_dl MACH_SMARTMETER_DL SMARTMETER_DL 2599 wzl6410 MACH_WZL6410 WZL6410 2600 wzl6410m MACH_WZL6410M WZL6410M 2601 @@ -2591,7 +2584,6 @@ spacecom1 MACH_SPACECOM1 SPACECOM1 2604 pingu920 MACH_PINGU920 PINGU920 2605 bravoc MACH_BRAVOC BRAVOC 2606 -mydev MACH_CYBO2440 CYBO2440 2607 vdssw MACH_VDSSW VDSSW 2608 romulus MACH_ROMULUS ROMULUS 2609 omap_magic MACH_OMAP_MAGIC OMAP_MAGIC 2610 @@ -2609,7 +2601,7 @@ lexikon MACH_LEXIKON LEXIKON 2622 mini2440v2 MACH_MINI2440V2 MINI2440V2 2623 icontrol MACH_ICONTROL ICONTROL 2624 -gplugd MACH_SHEEVAD SHEEVAD 2625 +gplugd MACH_GPLUGD GPLUGD 2625 qsd8x50a_st1_1 MACH_QSD8X50A_ST1_1 QSD8X50A_ST1_1 2626 qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627 bee MACH_BEE BEE 2628 @@ -2662,12 +2654,12 @@ reb01 MACH_REB01 REB01 2675 aquila MACH_AQUILA AQUILA 2676 spark_sls_hw2 MACH_SPARK_SLS_HW2 SPARK_SLS_HW2 2677 -sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 +esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 micro2440 MACH_MICRO2440 MICRO2440 2680 am2440 MACH_AM2440 AM2440 2681 tq2440 MACH_TQ2440 TQ2440 2682 -lpc2478oem MACH_LPC2478OEM LPC2478OEM 2683 +ea2478devkit MACH_EA2478DEVKIT EA2478DEVKIT 2683 ak880x MACH_AK880X AK880X 2684 cobra3530 MACH_COBRA3530 COBRA3530 2685 pmppb MACH_PMPPB PMPPB 2686 @@ -2683,7 +2675,6 @@ mw6410 MACH_MW6410 MW6410 2696 terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 cpu8000e MACH_CPU8000E CPU8000E 2698 -catania_s MACH_CATANIA CATANIA 2699 tokyo MACH_TOKYO TOKYO 2700 msm7201a_surf MACH_MSM7201A_SURF MSM7201A_SURF 2701 msm7201a_ffa MACH_MSM7201A_FFA MSM7201A_FFA 2702 @@ -2735,13 +2726,12 @@ bcmring_tablet_v1 MACH_BCMRING_TABLET_V1 BCMRING_TABLET_V1 2748 sgarm10 MACH_SGARM10 SGARM10 2749 cm_t3517 MACH_CM_T3517 CM_T3517 2750 -omap3_cps MACH_OMAP3_CPS OMAP3_CPS 2751 +dig297 MACH_OMAP3_CPS OMAP3_CPS 2751 axar1500_receiver MACH_AXAR1500_RECEIVER AXAR1500_RECEIVER 2752 wbd222 MACH_WBD222 WBD222 2753 mt65xx MACH_MT65XX MT65XX 2754 msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755 msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756 -vmc300 MACH_VMC300 VMC300 2757 tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758 nanos MACH_NANOS NANOS 2759 stamp9g10 MACH_STAMP9G10 STAMP9G10 2760 @@ -2750,7 +2740,6 @@ smint01 MACH_SMINT01 SMINT01 2763 prtlvt2 MACH_PRTLVT2 PRTLVT2 2764 ap420 MACH_AP420 AP420 2765 -htcclio MACH_HTCSHIFT HTCSHIFT 2766 davinci_dm365_fc MACH_DAVINCI_DM365_FC DAVINCI_DM365_FC 2767 msm8x55_surf MACH_MSM8X55_SURF MSM8X55_SURF 2768 msm8x55_ffa MACH_MSM8X55_FFA MSM8X55_FFA 2769 @@ -2788,7 +2777,6 @@ neocoreomap MACH_NEOCOREOMAP NEOCOREOMAP 2801 withings_wbp MACH_WITHINGS_WBP WITHINGS_WBP 2802 dbps MACH_DBPS DBPS 2803 -at91sam9261 MACH_SBC9261 SBC9261 2804 pcbfp0001 MACH_PCBFP0001 PCBFP0001 2805 speedy MACH_SPEEDY SPEEDY 2806 chrysaor MACH_CHRYSAOR CHRYSAOR 2807 @@ -2804,15 +2792,14 @@ snapper9g45 MACH_SNAPPER9G45 SNAPPER9G45 2817 tam3517 MACH_TAM3517 TAM3517 2818 pdc100 MACH_PDC100 PDC100 2819 -eukrea_cpuimx25sd MACH_EUKREA_CPUIMX25 EUKREA_CPUIMX25 2820 -eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35 EUKREA_CPUIMX35 2821 +eukrea_cpuimx25sd MACH_EUKREA_CPUIMX25SD EUKREA_CPUIMX25SD 2820 +eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35SD EUKREA_CPUIMX35SD 2821 eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822 eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823 p565 MACH_P565 P565 2824 acer_a4 MACH_ACER_A4 ACER_A4 2825 davinci_dm368_bip MACH_DAVINCI_DM368_BIP DAVINCI_DM368_BIP 2826 eshare MACH_ESHARE ESHARE 2827 -omapl138_europa MACH_HW_OMAPL138_EUROPA HW_OMAPL138_EUROPA 2828 wlbargn MACH_WLBARGN WLBARGN 2829 bm170 MACH_BM170 BM170 2830 netspace_mini_v2 MACH_NETSPACE_MINI_V2 NETSPACE_MINI_V2 2831 @@ -2827,7 +2814,7 @@ spyplug MACH_SPYPLUG SPYPLUG 2840 ginger MACH_GINGER GINGER 2841 tny_t3530 MACH_TNY_T3530 TNY_T3530 2842 -pca102 MACH_PCA102 PCA102 2843 +pcaal1 MACH_PCAAL1 PCAAL1 2843 spade MACH_SPADE SPADE 2844 mxc25_topaz MACH_MXC25_TOPAZ MXC25_TOPAZ 2845 t5325 MACH_T5325 T5325 2846 @@ -2879,7 +2866,6 @@ mecha MACH_MECHA MECHA 2892 bubba3 MACH_BUBBA3 BUBBA3 2893 pupitre MACH_PUPITRE PUPITRE 2894 -tegra_unused MACH_TEGRA_HARMONY TEGRA_HARMONY 2895 tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896 tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897 simplenet MACH_SIMPLENET SIMPLENET 2898 @@ -2896,7 +2882,6 @@ app3k_robin MACH_APP3K_ROBIN APP3K_ROBIN 2909 pov15hd MACH_POV15HD POV15HD 2910 stella MACH_STELLA STELLA 2911 -htc_iolite MACH_MACH_HTC_IOLITE MACH_HTC_IOLITE 2912 linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913 netwalker MACH_NETWALKER NETWALKER 2914 acsx106 MACH_ACSX106 ACSX106 2915 @@ -2960,7 +2945,6 @@ pc9260_v2 MACH_PC9260_V2 PC9260_V2 2973 ptx7545 MACH_PTX7545 PTX7545 2974 tm_efdc MACH_TM_EFDC TM_EFDC 2975 -remove_me MACH_WALDO1 WALDO1 2976 omap3_waldo1 MACH_OMAP3_WALDO1 OMAP3_WALDO1 2977 flyer MACH_FLYER FLYER 2978 tornado3240 MACH_TORNADO3240 TORNADO3240 2979 @@ -2971,7 +2955,6 @@ ssc MACH_SSC SSC 2984 premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 wasabi MACH_WASABI WASABI 2986 -vivo_w MACH_VIVOW VIVOW 2987 mx50_rdp MACH_MX50_RDP MX50_RDP 2988 universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 real6410 MACH_REAL6410 REAL6410 2990 @@ -3019,12 +3002,10 @@ at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032 at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033 kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034 -at91sam9263router MACH_ORATISROUTER ORATISROUTER 3035 armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036 spdm MACH_SPDM SPDM 3037 gtib MACH_GTIB GTIB 3038 dgm3240 MACH_DGM3240 DGM3240 3039 -iv_atlas_i_lpe MACH_ATLAS_I_LPE ATLAS_I_LPE 3040 htcmega MACH_HTCMEGA HTCMEGA 3041 tricorder MACH_TRICORDER TRICORDER 3042 tx28 MACH_TX28 TX28 3043 @@ -3065,7 +3046,6 @@ rump MACH_RUMP RUMP 3078 tenderloin MACH_TENDERLOIN TENDERLOIN 3079 shortloin MACH_SHORTLOIN SHORTLOIN 3080 -roml1 MACH_CRESPO CRESPO 3081 antares MACH_ANTARES ANTARES 3082 wb40n MACH_WB40N WB40N 3083 herring MACH_HERRING HERRING 3084 @@ -3112,9 +3092,8 @@ smartqv5 MACH_SMARTQV5 SMARTQV5 3125 smartqv3 MACH_SMARTQV3 SMARTQV3 3126 smartqv7 MACH_SMARTQV7 SMARTQV7 3127 -tegra_paz00 MACH_PAZ00 PAZ00 3128 +paz00 MACH_PAZ00 PAZ00 3128 acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 -htc_willow MACH_HTCWILLOW HTCWILLOW 3130 fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131 hdgu MACH_HDGU HDGU 3132 pyramid MACH_PYRAMID PYRAMID 3133 @@ -3165,7 +3144,6 @@ s5500 MACH_S5500 S5500 3178 icon MACH_ICON ICON 3179 elephant MACH_ELEPHANT ELEPHANT 3180 -msm8x60_charm_surf MACH_MSM8X60_FUSION MSM8X60_FUSION 3181 shooter MACH_SHOOTER SHOOTER 3182 spade_lte MACH_SPADE_LTE SPADE_LTE 3183 philhwani MACH_PHILHWANI PHILHWANI 3184 @@ -3177,13 +3155,11 @@ sc575plc MACH_SC575PLC SC575PLC 3190 sc575hmi MACH_SC575IPC SC575IPC 3191 omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192 -rover_g7 MACH_G7 G7 3193 top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194 top9000_su MACH_TOP9000_SU TOP9000_SU 3195 utm300 MACH_UTM300 UTM300 3196 tsunagi MACH_TSUNAGI TSUNAGI 3197 ts75xx MACH_TS75XX TS75XX 3198 -msm8x60_charm_ffa MACH_MSM8X60_FUSN_FFA MSM8X60_FUSN_FFA 3199 ts47xx MACH_TS47XX TS47XX 3200 da850_k5 MACH_DA850_K5 DA850_K5 3201 ax502 MACH_AX502 AX502 3202 @@ -3193,10 +3169,9 @@ ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 punica MACH_PUNICA PUNICA 3208 -trimslice MACH_SBC_NT250 SBC_NT250 3209 +trimslice MACH_TRIMSLICE TRIMSLICE 3209 mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210 mackerel MACH_MACKEREL MACKEREL 3211 -pvd_imx27 MACH_MACH_PVD_IMX27 MACH_PVD_IMX27 3212 fa9x27 MACH_FA9X27 FA9X27 3213 ns2816tb MACH_NS2816TB NS2816TB 3214 ns2816_ntpad MACH_NS2816_NTPAD NS2816_NTPAD 3215 @@ -3236,7 +3211,6 @@ dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249 dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250 anchovy MACH_ANCHOVY ANCHOVY 3251 -linux MACH_LINUX LINUX 3252 re2rev20 MACH_RE2REV20 RE2REV20 3253 re2rev21 MACH_RE2REV21 RE2REV21 3254 cns21xx MACH_CNS21XX CNS21XX 3255 @@ -3250,10 +3224,767 @@ omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264 mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265 mione MACH_MIONE MIONE 3266 -top9000_rcu MACH_TOP9000_RCU TOP9000_RCU 3267 +top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267 top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268 kingdom MACH_KINGDOM KINGDOM 3269 armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270 lq2 MACH_LQ2 LQ2 3271 sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272 mx53_loco MACH_MX53_LOCO MX53_LOCO 3273 +acer_a8 MACH_ACER_A8 ACER_A8 3275 +acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276 +guppy MACH_GUPPY GUPPY 3277 +mx61_ard MACH_MX61_ARD MX61_ARD 3278 +tx53 MACH_TX53 TX53 3279 +omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280 +uemd MACH_UEMD UEMD 3281 +ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282 +rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283 +encore MACH_ENCORE ENCORE 3284 +hkdkc100 MACH_HKDKC100 HKDKC100 3285 +ts42xx MACH_TS42XX TS42XX 3286 +aebl MACH_AEBL AEBL 3287 +wario MACH_WARIO WARIO 3288 +gfs_spm MACH_GFS_SPM GFS_SPM 3289 +cm_t3730 MACH_CM_T3730 CM_T3730 3290 +isc3 MACH_ISC3 ISC3 3291 +rascal MACH_RASCAL RASCAL 3292 +hrefv60 MACH_HREFV60 HREFV60 3293 +tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294 +pydtd MACH_PYRAMID_TD PYRAMID_TD 3295 +splendor MACH_SPLENDOR SPLENDOR 3296 +guf_vincell MACH_GUF_PLANET GUF_PLANET 3297 +msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298 +htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299 +athene MACH_ATHENE ATHENE 3300 +deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301 +vivow_ct MACH_VIVOW_CT VIVOW_CT 3302 +nery_1000 MACH_NERY_1000 NERY_1000 3303 +rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304 +nmh MACH_NMH NMH 3305 +wn802t MACH_WN802T WN802T 3306 +dragonet MACH_DRAGONET DRAGONET 3307 +geneva_b4 MACH_GENEVA_B GENEVA_B 3308 +at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309 +bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310 +bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311 +koi MACH_KOI KOI 3312 +ts4800 MACH_TS4800 TS4800 3313 +tqma9263 MACH_TQMA9263 TQMA9263 3314 +holiday MACH_HOLIDAY HOLIDAY 3315 +dma_6410 MACH_DMA6410 DMA6410 3316 +pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317 +hwgw6410 MACH_HWGW6410 HWGW6410 3318 +shenzhou MACH_SHENZHOU SHENZHOU 3319 +cwme9210 MACH_CWME9210 CWME9210 3320 +cwme9210js MACH_CWME9210JS CWME9210JS 3321 +pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322 +colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323 +w21 MACH_W21 W21 3324 +polysat1 MACH_POLYSAT1 POLYSAT1 3325 +dataway MACH_DATAWAY DATAWAY 3326 +cobral138 MACH_COBRAL138 COBRAL138 3327 +roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328 +marvelc MACH_MARVELC MARVELC 3329 +navefihid MACH_NAVEFIHID NAVEFIHID 3330 +dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331 +able MACH_ABLE ABLE 3332 +legacy MACH_LEGACY LEGACY 3333 +icong MACH_ICONG ICONG 3334 +rover_g8 MACH_ROVER_G8 ROVER_G8 3335 +t5388p MACH_T5388P T5388P 3336 +dingo MACH_DINGO DINGO 3337 +goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338 +lanreadyfn511 MACH_LANREADYFN511 LANREADYFN511 3340 +omap3_baia MACH_OMAP3_BAIA OMAP3_BAIA 3341 +omap3smartdisplay MACH_OMAP3SMARTDISPLAY OMAP3SMARTDISPLAY 3342 +xilinx MACH_XILINX XILINX 3343 +a2f MACH_A2F A2F 3344 +sky25 MACH_SKY25 SKY25 3345 +ccmx53 MACH_CCMX53 CCMX53 3346 +ccmx53js MACH_CCMX53JS CCMX53JS 3347 +ccwmx53 MACH_CCWMX53 CCWMX53 3348 +ccwmx53js MACH_CCWMX53JS CCWMX53JS 3349 +frisms MACH_FRISMS FRISMS 3350 +msm7x27a_ffa MACH_MSM7X27A_FFA MSM7X27A_FFA 3351 +msm7x27a_surf MACH_MSM7X27A_SURF MSM7X27A_SURF 3352 +msm7x27a_rumi3 MACH_MSM7X27A_RUMI3 MSM7X27A_RUMI3 3353 +dimmsam9g20 MACH_DIMMSAM9G20 DIMMSAM9G20 3354 +dimm_imx28 MACH_DIMM_IMX28 DIMM_IMX28 3355 +amk_a4 MACH_AMK_A4 AMK_A4 3356 +gnet_sgme MACH_GNET_SGME GNET_SGME 3357 +shooter_u MACH_SHOOTER_U SHOOTER_U 3358 +vmx53 MACH_VMX53 VMX53 3359 +rhino MACH_RHINO RHINO 3360 +armlex4210 MACH_ARMLEX4210 ARMLEX4210 3361 +swarcoextmodem MACH_SWARCOEXTMODEM SWARCOEXTMODEM 3362 +snowball MACH_SNOWBALL SNOWBALL 3363 +pcm049 MACH_PCM049 PCM049 3364 +vigor MACH_VIGOR VIGOR 3365 +oslo_amundsen MACH_OSLO_AMUNDSEN OSLO_AMUNDSEN 3366 +gsl_diamond MACH_GSL_DIAMOND GSL_DIAMOND 3367 +cv2201 MACH_CV2201 CV2201 3368 +cv2202 MACH_CV2202 CV2202 3369 +cv2203 MACH_CV2203 CV2203 3370 +vit_ibox MACH_VIT_IBOX VIT_IBOX 3371 +dm6441_esp MACH_DM6441_ESP DM6441_ESP 3372 +at91sam9x5ek MACH_AT91SAM9X5EK AT91SAM9X5EK 3373 +libra MACH_LIBRA LIBRA 3374 +easycrrh MACH_EASYCRRH EASYCRRH 3375 +tripel MACH_TRIPEL TRIPEL 3376 +endian_mini MACH_ENDIAN_MINI ENDIAN_MINI 3377 +xilinx_ep107 MACH_XILINX_EP107 XILINX_EP107 3378 +nuri MACH_NURI NURI 3379 +janus MACH_JANUS JANUS 3380 +ddnas MACH_DDNAS DDNAS 3381 +tag MACH_TAG TAG 3382 +tagw MACH_TAGW TAGW 3383 +nitrogen_vm_imx51 MACH_NITROGEN_VM_IMX51 NITROGEN_VM_IMX51 3384 +viprinet MACH_VIPRINET VIPRINET 3385 +bockw MACH_BOCKW BOCKW 3386 +eva2000 MACH_EVA2000 EVA2000 3387 +steelyard MACH_STEELYARD STEELYARD 3388 +ea2468devkit MACH_LPC2468OEM LPC2468OEM 3389 +sdh001 MACH_MACH_SDH001 MACH_SDH001 3390 +fe2478mblox MACH_LPC2478MICROBLOX LPC2478MICROBLOX 3391 +nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392 +geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393 +spear1340 MACH_SPEAR1340 SPEAR1340 3394 +rexmas MACH_REXMAS REXMAS 3395 +msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396 +msm8960_mtp MACH_MSM8960_MDP MSM8960_MDP 3397 +msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398 +msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399 +helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400 +mif10p MACH_MIF10P MIF10P 3401 +iam28 MACH_IAM28 IAM28 3402 +picasso MACH_PICASSO PICASSO 3403 +mr301a MACH_MR301A MR301A 3404 +notle MACH_NOTLE NOTLE 3405 +eelx2 MACH_EELX2 EELX2 3406 +moon MACH_MOON MOON 3407 +ruby MACH_RUBY RUBY 3408 +goldengate MACH_GOLDENGATE GOLDENGATE 3409 +ctbu_gen2 MACH_CTBU_GEN2 CTBU_GEN2 3410 +kmp_am17_01 MACH_KMP_AM17_01 KMP_AM17_01 3411 +wtplug MACH_WTPLUG WTPLUG 3412 +mx27su2 MACH_MX27SU2 MX27SU2 3413 +nb31 MACH_NB31 NB31 3414 +hjsdu MACH_HJSDU HJSDU 3415 +td3_rev1 MACH_TD3_REV1 TD3_REV1 3416 +eag_ci4000 MACH_EAG_CI4000 EAG_CI4000 3417 +net5big_nand_v2 MACH_NET5BIG_NAND_V2 NET5BIG_NAND_V2 3418 +cpx2 MACH_CPX2 CPX2 3419 +net2big_nand_v2 MACH_NET2BIG_NAND_V2 NET2BIG_NAND_V2 3420 +ecuv5 MACH_ECUV5 ECUV5 3421 +hsgx6d MACH_HSGX6D HSGX6D 3422 +dawad7 MACH_DAWAD7 DAWAD7 3423 +sam9repeater MACH_SAM9REPEATER SAM9REPEATER 3424 +gt_i5700 MACH_GT_I5700 GT_I5700 3425 +ctera_plug_c2 MACH_CTERA_PLUG_C2 CTERA_PLUG_C2 3426 +marvelct MACH_MARVELCT MARVELCT 3427 +ag11005 MACH_AG11005 AG11005 3428 +omap_tabletblaze MACH_OMAP_BLAZE OMAP_BLAZE 3429 +vangogh MACH_VANGOGH VANGOGH 3430 +matrix505 MACH_MATRIX505 MATRIX505 3431 +oce_nigma MACH_OCE_NIGMA OCE_NIGMA 3432 +t55 MACH_T55 T55 3433 +bio3k MACH_BIO3K BIO3K 3434 +expressct MACH_EXPRESSCT EXPRESSCT 3435 +cardhu MACH_CARDHU CARDHU 3436 +aruba MACH_ARUBA ARUBA 3437 +bonaire MACH_BONAIRE BONAIRE 3438 +nuc700evb MACH_NUC700EVB NUC700EVB 3439 +nuc710evb MACH_NUC710EVB NUC710EVB 3440 +nuc740evb MACH_NUC740EVB NUC740EVB 3441 +nuc745evb MACH_NUC745EVB NUC745EVB 3442 +transcede MACH_TRANSCEDE TRANSCEDE 3443 +mora MACH_MORA MORA 3444 +nda_evm MACH_NDA_EVM NDA_EVM 3445 +timu MACH_TIMU TIMU 3446 +expressh MACH_EXPRESSH EXPRESSH 3447 +veridis_a300 MACH_VERIDIS_A300 VERIDIS_A300 3448 +dm368_leopard MACH_DM368_LEOPARD DM368_LEOPARD 3449 +omap_mcop MACH_OMAP_MCOP OMAP_MCOP 3450 +tritip MACH_TRITIP TRITIP 3451 +sm1k MACH_SM1K SM1K 3452 +monch MACH_MONCH MONCH 3453 +curacao MACH_CURACAO CURACAO 3454 +origen MACH_ORIGEN ORIGEN 3455 +epc10 MACH_EPC10 EPC10 3456 +sgh_i740 MACH_SGH_I740 SGH_I740 3457 +tuna MACH_TUNA TUNA 3458 +mx51_tulip MACH_MX51_TULIP MX51_TULIP 3459 +mx51_aster7 MACH_MX51_ASTER7 MX51_ASTER7 3460 +acro37xbrd MACH_ACRO37XBRD ACRO37XBRD 3461 +elke MACH_ELKE ELKE 3462 +sbc6000x MACH_SBC6000X SBC6000X 3463 +r1801e MACH_R1801E R1801E 3464 +h1600 MACH_H1600 H1600 3465 +mini210 MACH_MINI210 MINI210 3466 +mini8168 MACH_MINI8168 MINI8168 3467 +pc7308 MACH_PC7308 PC7308 3468 +ge863pro3 MACH_GE863 GE863 3469 +kmm2m01 MACH_KMM2M01 KMM2M01 3470 +mx51erebus MACH_MX51EREBUS MX51EREBUS 3471 +wm8650refboard MACH_WM8650REFBOARD WM8650REFBOARD 3472 +tuxrail MACH_TUXRAIL TUXRAIL 3473 +arthur MACH_ARTHUR ARTHUR 3474 +doorboy MACH_DOORBOY DOORBOY 3475 +xarina MACH_XARINA XARINA 3476 +roverx7 MACH_ROVERX7 ROVERX7 3477 +sdvr MACH_SDVR SDVR 3478 +acer_maya MACH_ACER_MAYA ACER_MAYA 3479 +pico MACH_PICO PICO 3480 +cwmx233 MACH_CWMX233 CWMX233 3481 +cwam1808 MACH_CWAM1808 CWAM1808 3482 +cwdm365 MACH_CWDM365 CWDM365 3483 +mx51_moray MACH_MX51_MORAY MX51_MORAY 3484 +thales_cbc MACH_THALES_CBC THALES_CBC 3485 +bluepoint MACH_BLUEPOINT BLUEPOINT 3486 +dir665 MACH_DIR665 DIR665 3487 +acmerover1 MACH_ACMEROVER1 ACMEROVER1 3488 +shooter_ct MACH_SHOOTER_CT SHOOTER_CT 3489 +bliss MACH_BLISS BLISS 3490 +blissc MACH_BLISSC BLISSC 3491 +thales_adc MACH_THALES_ADC THALES_ADC 3492 +ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 +atdgp318 MACH_ATDGP318 ATDGP318 3494 +dma210u MACH_DMA210U DMA210U 3495 +em_t3 MACH_EM_T3 EM_T3 3496 +htx3250 MACH_HTX3250 HTX3250 3497 +g50 MACH_G50 G50 3498 +eco5 MACH_ECO5 ECO5 3499 +wintergrasp MACH_WINTERGRASP WINTERGRASP 3500 +puro MACH_PURO PURO 3501 +shooter_k MACH_SHOOTER_K SHOOTER_K 3502 +nspire MACH_NSPIRE NSPIRE 3503 +mickxx MACH_MICKXX MICKXX 3504 +lxmb MACH_LXMB LXMB 3505 +tmdxscbp6618x MACH_TMDXSCBP6616X TMDXSCBP6616X 3506 +adam MACH_ADAM ADAM 3507 +b1004 MACH_B1004 B1004 3508 +oboea MACH_OBOEA OBOEA 3509 +a1015 MACH_A1015 A1015 3510 +robin_vbdt30 MACH_ROBIN_VBDT30 ROBIN_VBDT30 3511 +tegra_enterprise MACH_TEGRA_ENTERPRISE TEGRA_ENTERPRISE 3512 +rfl108200_mk10 MACH_RFL108200_MK10 RFL108200_MK10 3513 +rfl108300_mk16 MACH_RFL108300_MK16 RFL108300_MK16 3514 +rover_v7 MACH_ROVER_V7 ROVER_V7 3515 +miphone MACH_MIPHONE MIPHONE 3516 +femtobts MACH_FEMTOBTS FEMTOBTS 3517 +monopoli MACH_MONOPOLI MONOPOLI 3518 +boss MACH_BOSS BOSS 3519 +davinci_dm368_vtam MACH_DAVINCI_DM368_VTAM DAVINCI_DM368_VTAM 3520 +clcon MACH_CLCON CLCON 3521 +nokia_rm696 MACH_NOKIA_RM696 NOKIA_RM696 3522 +tahiti MACH_TAHITI TAHITI 3523 +fighter MACH_FIGHTER FIGHTER 3524 +sgh_i710 MACH_SGH_I710 SGH_I710 3525 +integreproscb MACH_INTEGREPROSCB INTEGREPROSCB 3526 +monza MACH_MONZA MONZA 3527 +calimain MACH_CALIMAIN CALIMAIN 3528 +mx6q_sabreauto MACH_MX6Q_SABREAUTO MX6Q_SABREAUTO 3529 +gma01x MACH_GMA01X GMA01X 3530 +sbc51 MACH_SBC51 SBC51 3531 +fit MACH_FIT FIT 3532 +steelhead MACH_STEELHEAD STEELHEAD 3533 +panther MACH_PANTHER PANTHER 3534 +msm8960_liquid MACH_MSM8960_LIQUID MSM8960_LIQUID 3535 +lexikonct MACH_LEXIKONCT LEXIKONCT 3536 +ns2816_stb MACH_NS2816_STB NS2816_STB 3537 +sei_mm2_lpc3250 MACH_SEI_MM2_LPC3250 SEI_MM2_LPC3250 3538 +cmimx53 MACH_CMIMX53 CMIMX53 3539 +sandwich MACH_SANDWICH SANDWICH 3540 +chief MACH_CHIEF CHIEF 3541 +pogo_e02 MACH_POGO_E02 POGO_E02 3542 +mikrap_x168 MACH_MIKRAP_X168 MIKRAP_X168 3543 +htcmozart MACH_HTCMOZART HTCMOZART 3544 +htcgold MACH_HTCGOLD HTCGOLD 3545 +mt72xx MACH_MT72XX MT72XX 3546 +mx51_ivy MACH_MX51_IVY MX51_IVY 3547 +mx51_lvd MACH_MX51_LVD MX51_LVD 3548 +omap3_wiser2 MACH_OMAP3_WISER2 OMAP3_WISER2 3549 +dreamplug MACH_DREAMPLUG DREAMPLUG 3550 +cobas_c_111 MACH_COBAS_C_111 COBAS_C_111 3551 +cobas_u_411 MACH_COBAS_U_411 COBAS_U_411 3552 +hssd MACH_HSSD HSSD 3553 +iom35x MACH_IOM35X IOM35X 3554 +psom_omap MACH_PSOM_OMAP PSOM_OMAP 3555 +iphone_2g MACH_IPHONE_2G IPHONE_2G 3556 +iphone_3g MACH_IPHONE_3G IPHONE_3G 3557 +ipod_touch_1g MACH_IPOD_TOUCH_1G IPOD_TOUCH_1G 3558 +pharos_tpc MACH_PHAROS_TPC PHAROS_TPC 3559 +mx53_hydra MACH_MX53_HYDRA MX53_HYDRA 3560 +ns2816_dev_board MACH_NS2816_DEV_BOARD NS2816_DEV_BOARD 3561 +iphone_3gs MACH_IPHONE_3GS IPHONE_3GS 3562 +iphone_4 MACH_IPHONE_4 IPHONE_4 3563 +ipod_touch_4g MACH_IPOD_TOUCH_4G IPOD_TOUCH_4G 3564 +dragon_e1100 MACH_DRAGON_E1100 DRAGON_E1100 3565 +topside MACH_TOPSIDE TOPSIDE 3566 +irisiii MACH_IRISIII IRISIII 3567 +deto_macarm9 MACH_DETO_MACARM9 DETO_MACARM9 3568 +eti_d1 MACH_ETI_D1 ETI_D1 3569 +som3530sdk MACH_SOM3530SDK SOM3530SDK 3570 +oc_engine MACH_OC_ENGINE OC_ENGINE 3571 +apq8064_sim MACH_APQ8064_SIM APQ8064_SIM 3572 +alps MACH_ALPS ALPS 3575 +tny_t3730 MACH_TNY_T3730 TNY_T3730 3576 +geryon_nfe MACH_GERYON_NFE GERYON_NFE 3577 +ns2816_ref_board MACH_NS2816_REF_BOARD NS2816_REF_BOARD 3578 +silverstone MACH_SILVERSTONE SILVERSTONE 3579 +mtt2440 MACH_MTT2440 MTT2440 3580 +ynicdb MACH_YNICDB YNICDB 3581 +bct MACH_BCT BCT 3582 +tuscan MACH_TUSCAN TUSCAN 3583 +xbt_sam9g45 MACH_XBT_SAM9G45 XBT_SAM9G45 3584 +enbw_cmc MACH_ENBW_CMC ENBW_CMC 3585 +msm8x60_dragon MACH_APQ8060_DRAGON APQ8060_DRAGON 3586 +ch104mx257 MACH_CH104MX257 CH104MX257 3587 +openpri MACH_OPENPRI OPENPRI 3588 +am335xevm MACH_AM335XEVM AM335XEVM 3589 +picodmb MACH_PICODMB PICODMB 3590 +waluigi MACH_WALUIGI WALUIGI 3591 +punicag7 MACH_PUNICAG7 PUNICAG7 3592 +ipad_1g MACH_IPAD_1G IPAD_1G 3593 +appletv_2g MACH_APPLETV_2G APPLETV_2G 3594 +mach_ecog45 MACH_MACH_ECOG45 MACH_ECOG45 3595 +ait_cam_enc_4xx MACH_AIT_CAM_ENC_4XX AIT_CAM_ENC_4XX 3596 +runnymede MACH_RUNNYMEDE RUNNYMEDE 3597 +play MACH_PLAY PLAY 3598 +hw90260 MACH_HW90260 HW90260 3599 +tagh MACH_TAGH TAGH 3600 +filbert MACH_FILBERT FILBERT 3601 +getinge_netcomv3 MACH_GETINGE_NETCOMV3 GETINGE_NETCOMV3 3602 +cw20 MACH_CW20 CW20 3603 +cinema MACH_CINEMA CINEMA 3604 +cinema_tea MACH_CINEMA_TEA CINEMA_TEA 3605 +cinema_coffee MACH_CINEMA_COFFEE CINEMA_COFFEE 3606 +cinema_juice MACH_CINEMA_JUICE CINEMA_JUICE 3607 +linux_pad MACH_THEPAD THEPAD 3608 +mx53_mirage2 MACH_MX53_MIRAGE2 MX53_MIRAGE2 3609 +mx53_efikasb MACH_MX53_EFIKASB MX53_EFIKASB 3610 +stm_b2000 MACH_STM_B2000 STM_B2000 3612 +m28evk MACH_M28EVK M28EVK 3613 +pda MACH_PDA PDA 3614 +meraki_mr58 MACH_MERAKI_MR58 MERAKI_MR58 3615 +kota2 MACH_KOTA2 KOTA2 3616 +letcool MACH_LETCOOL LETCOOL 3617 +mx27iat MACH_MX27IAT MX27IAT 3618 +apollo_td MACH_APOLLO_TD APOLLO_TD 3619 +arena MACH_ARENA ARENA 3620 +gsngateway MACH_GSNGATEWAY GSNGATEWAY 3621 +lf2000 MACH_LF2000 LF2000 3622 +bonito MACH_BONITO BONITO 3623 +asymptote MACH_ASYMPTOTE ASYMPTOTE 3624 +bst2brd MACH_BST2BRD BST2BRD 3625 +tx335s MACH_TX335S TX335S 3626 +pelco_tesla MACH_PELCO_TESLA PELCO_TESLA 3627 +rrhtestplat MACH_RRHTESTPLAT RRHTESTPLAT 3628 +vidtonic_pro MACH_VIDTONIC_PRO VIDTONIC_PRO 3629 +pl_apollo MACH_PL_APOLLO PL_APOLLO 3630 +pl_phoenix MACH_PL_PHOENIX PL_PHOENIX 3631 +m28cu3 MACH_M28CU3 M28CU3 3632 +vvbox_hd MACH_VVBOX_HD VVBOX_HD 3633 +coreware_sam9260_ MACH_COREWARE_SAM9260_ COREWARE_SAM9260_ 3634 +marmaduke MACH_MARMADUKE MARMADUKE 3635 +amg_xlcore_camera MACH_AMG_XLCORE_CAMERA AMG_XLCORE_CAMERA 3636 +omap3_egf MACH_OMAP3_EGF OMAP3_EGF 3637 +smdk4212 MACH_SMDK4212 SMDK4212 3638 +dnp9200 MACH_DNP9200 DNP9200 3639 +tf101 MACH_TF101 TF101 3640 +omap3silvio MACH_OMAP3SILVIO OMAP3SILVIO 3641 +picasso2 MACH_PICASSO2 PICASSO2 3642 +vangogh2 MACH_VANGOGH2 VANGOGH2 3643 +olpc_xo_1_75 MACH_OLPC_XO_1_75 OLPC_XO_1_75 3644 +gx400 MACH_GX400 GX400 3645 +gs300 MACH_GS300 GS300 3646 +acer_a9 MACH_ACER_A9 ACER_A9 3647 +vivow_evm MACH_VIVOW_EVM VIVOW_EVM 3648 +veloce_cxq MACH_VELOCE_CXQ VELOCE_CXQ 3649 +veloce_cxm MACH_VELOCE_CXM VELOCE_CXM 3650 +p1852 MACH_P1852 P1852 3651 +naxy100 MACH_NAXY100 NAXY100 3652 +taishan MACH_TAISHAN TAISHAN 3653 +touchlink MACH_TOUCHLINK TOUCHLINK 3654 +stm32f103ze MACH_STM32F103ZE STM32F103ZE 3655 +mcx MACH_MCX MCX 3656 +stm_nmhdk_fli7610 MACH_STM_NMHDK_FLI7610 STM_NMHDK_FLI7610 3657 +top28x MACH_TOP28X TOP28X 3658 +okl4vp_microvisor MACH_OKL4VP_MICROVISOR OKL4VP_MICROVISOR 3659 +pop MACH_POP POP 3660 +layer MACH_LAYER LAYER 3661 +trondheim MACH_TRONDHEIM TRONDHEIM 3662 +eva MACH_EVA EVA 3663 +trust_taurus MACH_TRUST_TAURUS TRUST_TAURUS 3664 +ns2816_huashan MACH_NS2816_HUASHAN NS2816_HUASHAN 3665 +ns2816_yangcheng MACH_NS2816_YANGCHENG NS2816_YANGCHENG 3666 +p852 MACH_P852 P852 3667 +flea3 MACH_FLEA3 FLEA3 3668 +bowfin MACH_BOWFIN BOWFIN 3669 +mv88de3100 MACH_MV88DE3100 MV88DE3100 3670 +pia_am35x MACH_PIA_AM35X PIA_AM35X 3671 +cedar MACH_CEDAR CEDAR 3672 +picasso_e MACH_PICASSO_E PICASSO_E 3673 +samsung_e60 MACH_SAMSUNG_E60 SAMSUNG_E60 3674 +msm9615_cdp MACH_MDM9615 MDM9615 3675 +sdvr_mini MACH_SDVR_MINI SDVR_MINI 3676 +omap3_ij3k MACH_OMAP3_IJ3K OMAP3_IJ3K 3677 +modasmc1 MACH_MODASMC1 MODASMC1 3678 +apq8064_rumi3 MACH_APQ8064_RUMI3 APQ8064_RUMI3 3679 +matrix506 MACH_MATRIX506 MATRIX506 3680 +msm9615_mtp MACH_MSM9615_MTP MSM9615_MTP 3681 +dm36x_spawndc MACH_DM36X_SPAWNDC DM36X_SPAWNDC 3682 +sff792 MACH_SFF792 SFF792 3683 +am335xiaevm MACH_AM335XIAEVM AM335XIAEVM 3684 +g3c2440 MACH_G3C2440 G3C2440 3685 +tion270 MACH_TION270 TION270 3686 +w22q7arm02 MACH_W22Q7ARM02 W22Q7ARM02 3687 +omap_cat MACH_OMAP_CAT OMAP_CAT 3688 +at91sam9n12ek MACH_AT91SAM9N12EK AT91SAM9N12EK 3689 +morrison MACH_MORRISON MORRISON 3690 +svdu MACH_SVDU SVDU 3691 +lpp01 MACH_LPP01 LPP01 3692 +ubc283 MACH_UBC283 UBC283 3693 +zeppelin MACH_ZEPPELIN ZEPPELIN 3694 +motus MACH_MOTUS MOTUS 3695 +neomainboard MACH_NEOMAINBOARD NEOMAINBOARD 3696 +devkit3250 MACH_DEVKIT3250 DEVKIT3250 3697 +devkit7000 MACH_DEVKIT7000 DEVKIT7000 3698 +fmc_uic MACH_FMC_UIC FMC_UIC 3699 +fmc_dcm MACH_FMC_DCM FMC_DCM 3700 +batwm MACH_BATWM BATWM 3701 +atlas6cb MACH_ATLAS6CB ATLAS6CB 3702 +quattro_f MACH_QUATTROF QUATTROF 3703 +quattro_u MACH_QUATTROU QUATTROU 3704 +blue MACH_BLUE BLUE 3705 +colorado MACH_COLORADO COLORADO 3706 +popc MACH_POPC POPC 3707 +promwad_jade MACH_PROMWAD_JADE PROMWAD_JADE 3708 +amp MACH_AMP AMP 3709 +gnet_amp MACH_GNET_AMP GNET_AMP 3710 +toques MACH_TOQUES TOQUES 3711 +apx4devkit MACH_APX4DEVKIT APX4DEVKIT 3712 +dct_storm MACH_DCT_STORM DCT_STORM 3713 +dm8168z3 MACH_Z3 Z3 3714 +owl MACH_OWL OWL 3715 +cogent_csb1741 MACH_COGENT_CSB1741 COGENT_CSB1741 3716 +omap3_kiko MACH_OMAP3 OMAP3 3717 +adillustra610 MACH_ADILLUSTRA610 ADILLUSTRA610 3718 +ecafe_na04 MACH_ECAFE_NA04 ECAFE_NA04 3719 +popct MACH_POPCT POPCT 3720 +omap3_helena MACH_OMAP3_HELENA OMAP3_HELENA 3721 +ach MACH_ACH ACH 3722 +module_dtb MACH_MODULE_DTB MODULE_DTB 3723 +ratebox MACH_RACKBOX RACKBOX 3724 +oslo_elisabeth MACH_OSLO_ELISABETH OSLO_ELISABETH 3725 +tt01 MACH_TT01 TT01 3726 +msm8930_cdp MACH_MSM8930_CDP MSM8930_CDP 3727 +msm8930_mtp MACH_MSM8930_MTP MSM8930_MTP 3728 +msm8930_fluid MACH_MSM8930_FLUID MSM8930_FLUID 3729 +ltu11 MACH_LTU11 LTU11 3730 +am1808_spawnco MACH_AM1808_SPAWNCO AM1808_SPAWNCO 3731 +flx6410 MACH_FLX6410 FLX6410 3732 +mx6q_qsb MACH_MX6Q_QSB MX6Q_QSB 3733 +mx53_plt424 MACH_MX53_PLT424 MX53_PLT424 3734 +jasmine MACH_JASMINE JASMINE 3735 +l138_owlboard_plus MACH_L138_OWLBOARD_PLUS L138_OWLBOARD_PLUS 3736 +wr21 MACH_WR21 WR21 3737 +peaboy MACH_PEABOY PEABOY 3739 +mx28_plato MACH_MX28_PLATO MX28_PLATO 3740 +kacom2 MACH_KACOM2 KACOM2 3741 +slco MACH_SLCO SLCO 3742 +imx51pico MACH_IMX51PICO IMX51PICO 3743 +glink1 MACH_GLINK1 GLINK1 3744 +diamond MACH_DIAMOND DIAMOND 3745 +d9000 MACH_D9000 D9000 3746 +w5300e01 MACH_W5300E01 W5300E01 3747 +im6000 MACH_IM6000 IM6000 3748 +mx51_fred51 MACH_MX51_FRED51 MX51_FRED51 3749 +stm32f2 MACH_STM32F2 STM32F2 3750 +ville MACH_VILLE VILLE 3751 +ptip_murnau MACH_PTIP_MURNAU PTIP_MURNAU 3752 +ptip_classic MACH_PTIP_CLASSIC PTIP_CLASSIC 3753 +mx53grb MACH_MX53GRB MX53GRB 3754 +gagarin MACH_GAGARIN GAGARIN 3755 +msm7627a_qrd1 MACH_MSM7X27A_QRD1 MSM7X27A_QRD1 3756 +nas2big MACH_NAS2BIG NAS2BIG 3757 +superfemto MACH_SUPERFEMTO SUPERFEMTO 3758 +teufel MACH_TEUFEL TEUFEL 3759 +dinara MACH_DINARA DINARA 3760 +vanquish MACH_VANQUISH VANQUISH 3761 +zipabox1 MACH_ZIPABOX1 ZIPABOX1 3762 +u9540 MACH_U9540 U9540 3763 +jet MACH_JET JET 3764 +smdk4412 MACH_SMDK4412 SMDK4412 3765 +elite MACH_ELITE ELITE 3766 +spear320_hmi MACH_SPEAR320_HMI SPEAR320_HMI 3767 +ontario MACH_ONTARIO ONTARIO 3768 +mx6q_sabrelite MACH_MX6Q_SABRELITE MX6Q_SABRELITE 3769 +vc200 MACH_VC200 VC200 3770 +msm7625a_ffa MACH_MSM7625A_FFA MSM7625A_FFA 3771 +msm7625a_surf MACH_MSM7625A_SURF MSM7625A_SURF 3772 +benthossbp MACH_BENTHOSSBP BENTHOSSBP 3773 +smdk5210 MACH_SMDK5210 SMDK5210 3774 +empq2300 MACH_EMPQ2300 EMPQ2300 3775 +minipos MACH_MINIPOS MINIPOS 3776 +omap5_sevm MACH_OMAP5_SEVM OMAP5_SEVM 3777 +shelter MACH_SHELTER SHELTER 3778 +omap3_devkit8500 MACH_OMAP3_DEVKIT8500 OMAP3_DEVKIT8500 3779 +edgetd MACH_EDGETD EDGETD 3780 +copperyard MACH_COPPERYARD COPPERYARD 3781 +edge MACH_EDGE EDGE 3782 +edge_u MACH_EDGE_U EDGE_U 3783 +edge_td MACH_EDGE_TD EDGE_TD 3784 +wdss MACH_WDSS WDSS 3785 +dl_pb25 MACH_DL_PB25 DL_PB25 3786 +dss11 MACH_DSS11 DSS11 3787 +cpa MACH_CPA CPA 3788 +aptp2000 MACH_APTP2000 APTP2000 3789 +marzen MACH_MARZEN MARZEN 3790 +st_turbine MACH_ST_TURBINE ST_TURBINE 3791 +gtl_it3300 MACH_GTL_IT3300 GTL_IT3300 3792 +mx6_mule MACH_MX6_MULE MX6_MULE 3793 +v7pxa_dt MACH_V7PXA_DT V7PXA_DT 3794 +v7mmp_dt MACH_V7MMP_DT V7MMP_DT 3795 +dragon7 MACH_DRAGON7 DRAGON7 3796 +krome MACH_KROME KROME 3797 +oratisdante MACH_ORATISDANTE ORATISDANTE 3798 +fathom MACH_FATHOM FATHOM 3799 +dns325 MACH_DNS325 DNS325 3800 +sarnen MACH_SARNEN SARNEN 3801 +ubisys_g1 MACH_UBISYS_G1 UBISYS_G1 3802 +mx53_pf1 MACH_MX53_PF1 MX53_PF1 3803 +asanti MACH_ASANTI ASANTI 3804 +volta MACH_VOLTA VOLTA 3805 +potenza MACH_S5P6450 S5P6450 3806 +knight MACH_KNIGHT KNIGHT 3807 +beaglebone MACH_BEAGLEBONE BEAGLEBONE 3808 +becker MACH_BECKER BECKER 3809 +fc360 MACH_FC360 FC360 3810 +pmi2_xls MACH_PMI2_XLS PMI2_XLS 3811 +taranto MACH_TARANTO TARANTO 3812 +plutux MACH_PLUTUX PLUTUX 3813 +ipmp_medcom MACH_IPMP_MEDCOM IPMP_MEDCOM 3814 +absolut MACH_ABSOLUT ABSOLUT 3815 +awpb3 MACH_AWPB3 AWPB3 3816 +nfp32xx_dt MACH_NFP32XX_DT NFP32XX_DT 3817 +dl_pb53 MACH_DL_PB53 DL_PB53 3818 +acu_ii MACH_ACU_II ACU_II 3819 +avalon MACH_AVALON AVALON 3820 +sphinx MACH_SPHINX SPHINX 3821 +titan_t MACH_TITAN_T TITAN_T 3822 +harvest_boris MACH_HARVEST_BORIS HARVEST_BORIS 3823 +mach_msm7x30_m3s MACH_MACH_MSM7X30_M3S MACH_MSM7X30_M3S 3824 +smdk5250 MACH_SMDK5250 SMDK5250 3825 +imxt_lite MACH_IMXT_LITE IMXT_LITE 3826 +imxt_std MACH_IMXT_STD IMXT_STD 3827 +imxt_log MACH_IMXT_LOG IMXT_LOG 3828 +imxt_nav MACH_IMXT_NAV IMXT_NAV 3829 +imxt_full MACH_IMXT_FULL IMXT_FULL 3830 +ag09015 MACH_AG09015 AG09015 3831 +am3517_mt_ventoux MACH_AM3517_MT_VENTOUX AM3517_MT_VENTOUX 3832 +dp1arm9 MACH_DP1ARM9 DP1ARM9 3833 +picasso_m MACH_PICASSO_M PICASSO_M 3834 +video_gadget MACH_VIDEO_GADGET VIDEO_GADGET 3835 +mtt_om3x MACH_MTT_OM3X MTT_OM3X 3836 +mx6q_arm2 MACH_MX6Q_ARM2 MX6Q_ARM2 3837 +picosam9g45 MACH_PICOSAM9G45 PICOSAM9G45 3838 +vpm_dm365 MACH_VPM_DM365 VPM_DM365 3839 +bonfire MACH_BONFIRE BONFIRE 3840 +mt2p2d MACH_MT2P2D MT2P2D 3841 +sigpda01 MACH_SIGPDA01 SIGPDA01 3842 +cn27 MACH_CN27 CN27 3843 +mx25_cwtap MACH_MX25_CWTAP MX25_CWTAP 3844 +apf28 MACH_APF28 APF28 3845 +pelco_maxwell MACH_PELCO_MAXWELL PELCO_MAXWELL 3846 +ge_phoenix MACH_GE_PHOENIX GE_PHOENIX 3847 +empc_a500 MACH_EMPC_A500 EMPC_A500 3848 +ims_arm9 MACH_IMS_ARM9 IMS_ARM9 3849 +mini2416 MACH_MINI2416 MINI2416 3850 +mini2450 MACH_MINI2450 MINI2450 3851 +mini310 MACH_MINI310 MINI310 3852 +spear_hurricane MACH_SPEAR_HURRICANE SPEAR_HURRICANE 3853 +mt7208 MACH_MT7208 MT7208 3854 +lpc178x MACH_LPC178X LPC178X 3855 +farleys MACH_FARLEYS FARLEYS 3856 +efm32gg_dk3750 MACH_EFM32GG_DK3750 EFM32GG_DK3750 3857 +zeus_board MACH_ZEUS_BOARD ZEUS_BOARD 3858 +cc51 MACH_CC51 CC51 3859 +fxi_c210 MACH_FXI_C210 FXI_C210 3860 +msm8627_cdp MACH_MSM8627_CDP MSM8627_CDP 3861 +msm8627_mtp MACH_MSM8627_MTP MSM8627_MTP 3862 +armadillo800eva MACH_ARMADILLO800EVA ARMADILLO800EVA 3863 +primou MACH_PRIMOU PRIMOU 3864 +primoc MACH_PRIMOC PRIMOC 3865 +primoct MACH_PRIMOCT PRIMOCT 3866 +a9500 MACH_A9500 A9500 3867 +pue_td MACH_PULSE_TD PULSE_TD 3868 +pluto MACH_PLUTO PLUTO 3869 +acfx100 MACH_ACFX100 ACFX100 3870 +msm8625_rumi3 MACH_MSM8625_RUMI3 MSM8625_RUMI3 3871 +valente MACH_VALENTE VALENTE 3872 +crfs_rfeye MACH_CRFS_RFEYE CRFS_RFEYE 3873 +rfeye MACH_RFEYE RFEYE 3874 +phidget_sbc3 MACH_PHIDGET_SBC3 PHIDGET_SBC3 3875 +tcw_mika MACH_TCW_MIKA TCW_MIKA 3876 +imx28_egf MACH_IMX28_EGF IMX28_EGF 3877 +valente_wx MACH_VALENTE_WX VALENTE_WX 3878 +huangshans MACH_HUANGSHANS HUANGSHANS 3879 +bosphorus1 MACH_BOSPHORUS1 BOSPHORUS1 3880 +prima MACH_PRIMA PRIMA 3881 +meson3_skt MACH_M3_SKT M3_SKT 3882 +meson3_ref MACH_M3_REF M3_REF 3883 +evita_ulk MACH_EVITA_ULK EVITA_ULK 3884 +merisc600 MACH_MERISC600 MERISC600 3885 +dolak MACH_DOLAK DOLAK 3886 +sbc53 MACH_SBC53 SBC53 3887 +elite_ulk MACH_ELITE_ULK ELITE_ULK 3888 +pov2 MACH_POV2 POV2 3889 +ipod_touch_2g MACH_IPOD_TOUCH_2G IPOD_TOUCH_2G 3890 +da850_pqab MACH_DA850_PQAB DA850_PQAB 3891 +fermi MACH_FERMI FERMI 3892 +ccardwmx28 MACH_CCARDWMX28 CCARDWMX28 3893 +ccardmx28 MACH_CCARDMX28 CCARDMX28 3894 +fs20_fcm2050 MACH_FS20_FCM2050 FS20_FCM2050 3895 +kinetis MACH_KINETIS KINETIS 3896 +kai MACH_KAI KAI 3897 +bcthb2 MACH_BCTHB2 BCTHB2 3898 +inels3_cu MACH_INELS3_CU INELS3_CU 3899 +da850_juniper MACH_JUNIPER JUNIPER 3900 +da850_apollo MACH_DA850_APOLLO DA850_APOLLO 3901 +tracnas MACH_TRACNAS TRACNAS 3902 +mityarm335x MACH_MITYARM335X MITYARM335X 3903 +xcgz7x MACH_XCGZ7X XCGZ7X 3904 +cubox MACH_CUBOX CUBOX 3905 +terminator MACH_TERMINATOR TERMINATOR 3906 +eye03 MACH_EYE03 EYE03 3907 +kota3 MACH_KOTA3 KOTA3 3908 +mx53_nitrogen_k MACH_MX5 MX5 3909 +pscpe MACH_PSCPE PSCPE 3910 +akt1100 MACH_AKT1100 AKT1100 3911 +pcaaxl2 MACH_PCAAXL2 PCAAXL2 3912 +primodd_ct MACH_PRIMODD_CT PRIMODD_CT 3913 +nsbc MACH_NSBC NSBC 3914 +meson2_skt MACH_MESON2_SKT MESON2_SKT 3915 +meson2_ref MACH_MESON2_REF MESON2_REF 3916 +ccardwmx28js MACH_CCARDWMX28JS CCARDWMX28JS 3917 +ccardmx28js MACH_CCARDMX28JS CCARDMX28JS 3918 +indico MACH_INDICO INDICO 3919 +msm8960dt MACH_MSM8960DT MSM8960DT 3920 +primods MACH_PRIMODS PRIMODS 3921 +beluga_m1388 MACH_BELUGA_M1388 BELUGA_M1388 3922 +primotd MACH_PRIMOTD PRIMOTD 3923 +varan_master MACH_VARAN_MASTER VARAN_MASTER 3924 +primodd MACH_PRIMODD PRIMODD 3925 +jetduo MACH_JETDUO JETDUO 3926 +mx53_umobo MACH_MX53_UMOBO MX53_UMOBO 3927 +trats MACH_TRATS TRATS 3928 +starcraft MACH_STARCRAFT STARCRAFT 3929 +qseven_tegra2 MACH_QSEVEN_TEGRA2 QSEVEN_TEGRA2 3930 +lichee_sun4i_devbd MACH_LICHEE_SUN4I_DEVBD LICHEE_SUN4I_DEVBD 3931 +movenow MACH_MOVENOW MOVENOW 3932 +golf_u MACH_GOLF_U GOLF_U 3933 +msm7627a_evb MACH_MSM7627A_EVB MSM7627A_EVB 3934 +rambo MACH_RAMBO RAMBO 3935 +golfu MACH_GOLFU GOLFU 3936 +mango310 MACH_MANGO310 MANGO310 3937 +dns343 MACH_DNS343 DNS343 3938 +var_som_om44 MACH_VAR_SOM_OM44 VAR_SOM_OM44 3939 +naon MACH_NAON NAON 3940 +vp4000 MACH_VP4000 VP4000 3941 +impcard MACH_IMPCARD IMPCARD 3942 +smoovcam MACH_SMOOVCAM SMOOVCAM 3943 +cobham3725 MACH_COBHAM3725 COBHAM3725 3944 +cobham3730 MACH_COBHAM3730 COBHAM3730 3945 +cobham3703 MACH_COBHAM3703 COBHAM3703 3946 +quetzal MACH_QUETZAL QUETZAL 3947 +apq8064_cdp MACH_APQ8064_CDP APQ8064_CDP 3948 +apq8064_mtp MACH_APQ8064_MTP APQ8064_MTP 3949 +apq8064_fluid MACH_APQ8064_FLUID APQ8064_FLUID 3950 +apq8064_liquid MACH_APQ8064_LIQUID APQ8064_LIQUID 3951 +mango210 MACH_MANGO210 MANGO210 3952 +mango100 MACH_MANGO100 MANGO100 3953 +mango24 MACH_MANGO24 MANGO24 3954 +mango64 MACH_MANGO64 MANGO64 3955 +nsa320 MACH_NSA320 NSA320 3956 +elv_ccu2 MACH_ELV_CCU2 ELV_CCU2 3957 +triton_x00 MACH_TRITON_X00 TRITON_X00 3958 +triton_1500_2000 MACH_TRITON_1500_2000 TRITON_1500_2000 3959 +pogoplugv4 MACH_POGOPLUGV4 POGOPLUGV4 3960 +venus_cl MACH_VENUS_CL VENUS_CL 3961 +vulcano_g20 MACH_VULCANO_G20 VULCANO_G20 3962 +sgs_i9100 MACH_SGS_I9100 SGS_I9100 3963 +stsv2 MACH_STSV2 STSV2 3964 +csb1724 MACH_CSB1724 CSB1724 3965 +omapl138_lcdk MACH_OMAPL138_LCDK OMAPL138_LCDK 3966 +jel_dd MACH_JEWEL_DD JEWEL_DD 3967 +pvd_mx25 MACH_PVD_MX25 PVD_MX25 3968 +meson6_skt MACH_MESON6_SKT MESON6_SKT 3969 +meson6_ref MACH_MESON6_REF MESON6_REF 3970 +pxm MACH_PXM PXM 3971 +stuttgart MACH_S3 S3 3972 +pogoplugv3 MACH_POGOPLUGV3 POGOPLUGV3 3973 +mlp89626 MACH_MLP89626 MLP89626 3974 +iomegahmndce MACH_IOMEGAHMNDCE IOMEGAHMNDCE 3975 +pogoplugv3pci MACH_POGOPLUGV3PCI POGOPLUGV3PCI 3976 +bntv250 MACH_BNTV250 BNTV250 3977 +mx53_qseven MACH_MX53_QSEVEN MX53_QSEVEN 3978 +gtl_it1100 MACH_GTL_IT1100 GTL_IT1100 3979 +mx6q_sabresd MACH_MX6Q_SABRESD MX6Q_SABRESD 3980 +mt4 MACH_MT4 MT4 3981 +jumbo_d MACH_JUMBO_D JUMBO_D 3982 +jumbo_i MACH_JUMBO_I JUMBO_I 3983 +fs20_dmp MACH_FS20_DMP FS20_DMP 3984 +dns320 MACH_DNS320 DNS320 3985 +mx28bacos MACH_MX28BACOS MX28BACOS 3986 +tl80 MACH_TL80 TL80 3987 +polatis_nic_1001 MACH_POLATIS_NIC_1001 POLATIS_NIC_1001 3988 +tely MACH_TELY TELY 3989 +u8520 MACH_U8520 U8520 3990 +manta MACH_MANTA MANTA 3991 +spear1340_lcad MACH_SPEAR_EM_S900 SPEAR_EM_S900 3992 +mpq8064_cdp MACH_MPQ8064_CDP MPQ8064_CDP 3993 +mpq8064_hrd MACH_MPQ8064_STB MPQ8064_STB 3994 +mpq8064_dtv MACH_MPQ8064_DTV MPQ8064_DTV 3995 +dm368som MACH_DM368SOM DM368SOM 3996 +gprisb2 MACH_GPRISB2 GPRISB2 3997 +chammid MACH_CHAMMID CHAMMID 3998 +seoul2 MACH_SEOUL2 SEOUL2 3999 +omap4_nooktablet MACH_OMAP4_NOOKTABLET OMAP4_NOOKTABLET 4000 +aalto MACH_AALTO AALTO 4001 +metro MACH_METRO METRO 4002 +cydm3730 MACH_CYDM3730 CYDM3730 4003 +tqma53 MACH_TQMA53 TQMA53 4004 +msm7627a_qrd3 MACH_MSM7627A_QRD3 MSM7627A_QRD3 4005 +mx28_canby MACH_MX28_CANBY MX28_CANBY 4006 +tiger MACH_TIGER TIGER 4007 +pcats_9307_type_a MACH_PCATS_9307_TYPE_A PCATS_9307_TYPE_A 4008 +pcats_9307_type_o MACH_PCATS_9307_TYPE_O PCATS_9307_TYPE_O 4009 +pcats_9307_type_r MACH_PCATS_9307_TYPE_R PCATS_9307_TYPE_R 4010 +streamplug MACH_STREAMPLUG STREAMPLUG 4011 +icechicken_dev MACH_ICECHICKEN_DEV ICECHICKEN_DEV 4012 +hedgehog MACH_HEDGEHOG HEDGEHOG 4013 +yusend_obc MACH_YUSEND_OBC YUSEND_OBC 4014 +imxninja MACH_IMXNINJA IMXNINJA 4015 +omap4_jarod MACH_OMAP4_JAROD OMAP4_JAROD 4016 +eco5_pk MACH_ECO5_PK ECO5_PK 4017 +qj2440 MACH_QJ2440 QJ2440 4018 +mx6q_mercury MACH_MX6Q_MERCURY MX6Q_MERCURY 4019 +cm6810 MACH_CM6810 CM6810 4020 +omap4_torpedo MACH_OMAP4_TORPEDO OMAP4_TORPEDO 4021 +nsa310 MACH_NSA310 NSA310 4022 +tmx536 MACH_TMX536 TMX536 4023 +ktt20 MACH_KTT20 KTT20 4024 +dragonix MACH_DRAGONIX DRAGONIX 4025 +lungching MACH_LUNGCHING LUNGCHING 4026 +bulogics MACH_BULOGICS BULOGICS 4027 +mx535_sx MACH_MX535_SX MX535_SX 4028 +ngui3250 MACH_NGUI3250 NGUI3250 4029 +salutec_dac MACH_SALUTEC_DAC SALUTEC_DAC 4030 +loco MACH_LOCO LOCO 4031 +ctera_plug_usi MACH_CTERA_PLUG_USI CTERA_PLUG_USI 4032 +scepter MACH_SCEPTER SCEPTER 4033 +sga MACH_SGA SGA 4034 +p_81_j5 MACH_P_81_J5 P_81_J5 4035 +p_81_o4 MACH_P_81_O4 P_81_O4 4036 diff -urN linux-2.6.35.3.fsl/drivers/hwmon/Kconfig linux-2.6.35.3.work/drivers/hwmon/Kconfig --- linux-2.6.35.3.fsl/drivers/hwmon/Kconfig 2015-11-23 20:06:25.587833713 +0100 +++ linux-2.6.35.3.work/drivers/hwmon/Kconfig 2015-11-22 16:44:14.971616903 +0100 @@ -681,6 +681,16 @@ This driver can also be built as a module. If so, the module will be called max6650. +config SENSORS_MMA845X + tristate "Freescale MMA845X sensor chips" + depends on I2C + help + If you say yes here you get support for the Freescale + MMA8450/MMA8451 gravity accelerator sensors chips. + + This driver can also be build as a module. If so, the module + will be called mma845x. + config SENSORS_PC87360 tristate "National Semiconductor PC87360 family" select HWMON_VID diff -urN linux-2.6.35.3.fsl/drivers/hwmon/Makefile linux-2.6.35.3.work/drivers/hwmon/Makefile --- linux-2.6.35.3.fsl/drivers/hwmon/Makefile 2015-11-23 20:06:25.587833713 +0100 +++ linux-2.6.35.3.work/drivers/hwmon/Makefile 2015-11-22 16:44:14.975616903 +0100 @@ -81,6 +81,7 @@ obj-$(CONFIG_SENSORS_MAX1619) += max1619.o obj-$(CONFIG_SENSORS_MAX17135) += max17135-hwmon.o obj-$(CONFIG_SENSORS_MAX6650) += max6650.o +obj-$(CONFIG_SENSORS_MMA845X) += mma845x.o obj-$(CONFIG_SENSORS_MC13783_ADC)+= mc13783-adc.o obj-$(CONFIG_SENSORS_PC87360) += pc87360.o obj-$(CONFIG_SENSORS_PC87427) += pc87427.o diff -urN linux-2.6.35.3.fsl/drivers/hwmon/mma845x.c linux-2.6.35.3.work/drivers/hwmon/mma845x.c --- linux-2.6.35.3.fsl/drivers/hwmon/mma845x.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.35.3.work/drivers/hwmon/mma845x.c 2015-11-22 16:44:14.975616903 +0100 @@ -0,0 +1,588 @@ +/* Driver for Freescale mma845[0,1,2,3] 3-axis gravity accelerator sensors + * + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Author: Zhang Jiejing + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * This driver currently only support mma8450 and mma8451. + * mma845x accelerator sensors are share same i2c slave address(7-bits): 0x1c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MMA8450_ID 0xc6 +#define MMA8451_ID 0x1a +#define MMA8452_ID 0x2a +#define MMA8453_ID 0x3a + +#define POLL_INTERVAL_MIN 1 +#define POLL_INTERVAL_MAX 500 +#define POLL_INTERVAL 100 /* msecs */ +#define INPUT_FUZZ 32 +#define INPUT_FLAT 32 +#define MODE_CHANGE_DELAY_MS 100 + +#define MMA845X_STATUS_ZYXDR 0x08 +#define MMA845X_BUF_SIZE 6 + +/* mma8450 registers */ +enum mma8450_registers { + MMA8450_STATUS1 = 0x00, + MMA8450_OUT_X8, + MMA8450_OUT_Y8, + MMA8450_OUT_Z8, + MMA8450_STATUS2, + MMA8450_OUT_X_LSB, + MMA8450_OUT_X_MSB, + MMA8450_OUT_Y_LSB, + MMA8450_OUT_Y_MSB, + MMA8450_OUT_Z_LSB, + MMA8450_OUT_Z_MSB, + MMA8450_STATUS3, + MMA8450_OUT_X_DELTA, + MMA8450_OUT_Y_DELTA, + MMA8450_OUT_Z_DELTA, + MMA8450_WHO_AM_I, + MMA8450_F_STATUS, + MMA8450_F_8DATA, + MMA8450_F_12DATA, + MMA8450_F_SETUP, + MMA8450_SYSMOD, + MMA8450_INT_SOURCE, + MMA8450_XYZ_DATA_CFG, + MMA8450_HP_FILTER_CUTOFF, + MMA8450_PL_STATUS, + MMA8450_PL_PRE_STATUS, + MMA8450_PL_CFG, + MMA8450_PL_COUNT, + MMA8450_PL_BF_ZCOMP, + MMA8450_PL_P_L_THS_REG1, + MMA8450_PL_P_L_THS_REG2, + MMA8450_PL_P_L_THS_REG3, + MMA8450_PL_L_P_THS_REG1, + MMA8450_PL_L_P_THS_REG2, + MMA8450_PL_L_P_THS_REG3, + MMA8450_FF_MT_CFG_1, + MMA8450_FF_MT_SRC_1, + MMA8450_FF_MT_THS_1, + MMA8450_FF_MT_COUNT_1, + MMA8450_FF_MT_CFG_2, + MMA8450_FF_MT_SRC_2, + MMA8450_FF_MT_THS_2, + MMA8450_FF_MT_COUNT_2, + MMA8450_TRANSIENT_CFG, + MMA8450_TRANSIENT_SRC, + MMA8450_TRANSIENT_THS, + MMA8450_TRANSIENT_COUNT, + MMA8450_PULSE_CFG, + MMA8450_PULSE_SRC, + MMA8450_PULSE_THSX, + MMA8450_PULSE_THSY, + MMA8450_PULSE_THSZ, + MMA8450_PULSE_TMLT, + MMA8450_PULSE_LTCY, + MMA8450_PULSE_WIND, + MMA8450_ASLP_COUNT, + MMA8450_CTRL_REG1, + MMA8450_CTRL_REG2, + MMA8450_CTRL_REG3, + MMA8450_CTRL_REG4, + MMA8450_CTRL_REG5, + MMA8450_OFF_X, + MMA8450_OFF_Y, + MMA8450_OFF_Z, + MMA8450_REG_END, +}; + +/* mma845x registers */ +enum mma845x_registers { + MMA8451_STATUS = 0x00, + MMA8451_OUT_X_MSB, + MMA8451_OUT_X_LSB, + MMA8451_OUT_Y_MSB, + MMA8451_OUT_Y_LSB, + MMA8451_OUT_Z_MSB, + MMA8451_OUT_Z_LSB, +// MMA8451_F_SETUP = 0x09, +// MMA8451_TRIG_CFG, + MMA8451_SYSMOD = 0x0B, + MMA8451_INT_SOURCE, + MMA8451_WHO_AM_I, + MMA8451_XYZ_DATA_CFG, + MMA8451_HP_FILTER_CUTOFF, + MMA8451_PL_STATUS, + MMA8451_PL_CFG, + MMA8451_PL_COUNT, + MMA8451_PL_BF_ZCOMP, + MMA8451_P_L_THS_REG, + MMA8451_FF_MT_CFG, + MMA8451_FF_MT_SRC, + MMA8451_FF_MT_THS, + MMA8451_FF_MT_COUNT, + MMA8451_TRANSIENT_CFG = 0x1D, + MMA8451_TRANSIENT_SRC, + MMA8451_TRANSIENT_THS, + MMA8451_TRANSIENT_COUNT, + MMA8451_PULSE_CFG, + MMA8451_PULSE_SRC, + MMA8451_PULSE_THSX, + MMA8451_PULSE_THSY, + MMA8451_PULSE_THSZ, + MMA8451_PULSE_TMLT, + MMA8451_PULSE_LTCY, + MMA8451_PULSE_WIND, + MMA8451_ASLP_COUNT, + MMA8451_CTRL_REG1, + MMA8451_CTRL_REG2, + MMA8451_CTRL_REG3, + MMA8451_CTRL_REG4, + MMA8451_CTRL_REG5, + MMA8451_OFF_X, + MMA8451_OFF_Y, + MMA8451_OFF_Z, + MMA8451_REG_END, +}; + + +/* MMA845x have 3 different mode, each mode have different sensitivity + * as below */ +/* MODE_2G: sensitivity is 1024 counts/g + * MODE_4G: sensitivity is 512 counts/g + * MODE_8G: sensitivity is 256 counts/g + */ +enum mma845x_mode { + MODE_2G = 0, + MODE_4G, + MODE_8G, +}; + +enum mma845x_type { + MMA8450, + MMA8451, + MMA8452, + MMA8453, +}; + +struct mma845x_info { + int type; + u8 mode; + u8 ctl_reg; + struct i2c_client *client; + struct input_polled_dev *idev; + struct device *hwmon_dev; +}; + +static DEFINE_MUTEX(mma845x_lock); + +/* Default use 2G mode */ +#define DEFAULT_SENSTIVE_MODE MODE_2G + +static const char *get_mma845x_name(int type) +{ + switch (type) { + case MMA8450: + return "mma8450"; + case MMA8451: + return "mma8451"; + case MMA8452: + return "mma8452"; + case MMA8453: + return "mma8453"; + default: + return "unknown"; + } +} + +static int get_ctrl_register(int type) +{ + switch (type) { + case MMA8450: + return MMA8450_STATUS3; + case MMA8451: + case MMA8452: + case MMA8453: + return MMA8451_STATUS; + } + return -EINVAL; +} + +static int mma8450_change_mode(struct mma845x_info *priv) +{ + int ret; + ret = i2c_smbus_write_byte_data(priv->client, + MMA8450_XYZ_DATA_CFG, 0x07); + ret |= i2c_smbus_write_byte_data(priv->client, + MMA8450_CTRL_REG1, priv->mode + 1); + if (ret < 0) { + dev_err(&priv->client->dev, "mma8450 init error"); + goto out; + } + mdelay(MODE_CHANGE_DELAY_MS); + return 0; +out: + return ret; +} + +static int mma8451_change_mode(struct mma845x_info *priv) +{ + int ret; + priv->ctl_reg |= 0x01; + ret = i2c_smbus_write_byte_data(priv->client, MMA8451_CTRL_REG1, 0); + if (ret < 0) + goto out; + ret = i2c_smbus_write_byte_data(priv->client, + MMA8451_XYZ_DATA_CFG, priv->mode); + ret |= i2c_smbus_write_byte_data(priv->client, + MMA8451_CTRL_REG1, priv->ctl_reg); + if (ret < 0) { + dev_err(&priv->client->dev, "mma8451 init error"); + goto out; + } + + mdelay(MODE_CHANGE_DELAY_MS); + return 0; +out: + return ret; +} + +static int init_mma845x_chip(struct mma845x_info *priv) +{ + int ret; + + switch (priv->type) { + case MMA8450: + ret = mma8450_change_mode(priv); + break; + case MMA8451: + case MMA8452: + case MMA8453: + ret = mma8451_change_mode(priv); + break; + default: + dev_err(&priv->client->dev, "sensor %s" + "is not supported by mma845x driver", + get_mma845x_name(priv->type)); + ret = -EINVAL; + } + return ret; +} + +static int mma845x_read_data(struct mma845x_info *priv, short *x, + short *y, short *z) +{ + u8 buf[MMA845X_BUF_SIZE]; + int reg_addr = -1; + int ret; + + switch (priv->type) { + case MMA8450: + reg_addr = MMA8450_OUT_X_LSB; + break; + case MMA8451: + case MMA8452: + case MMA8453: + reg_addr = MMA8451_OUT_X_MSB; + break; + default: + break; + } + + ret = i2c_smbus_read_i2c_block_data(priv->client, reg_addr, + MMA845X_BUF_SIZE, buf); + if (ret < MMA845X_BUF_SIZE) { + dev_err(&priv->client->dev, "i2c block read failed\n"); + return -EIO; + } + + switch (priv->type) { + case MMA8450: + *x = (buf[1] << 8) | ((buf[0] << 4) & 0xf0); + *y = (buf[3] << 8) | ((buf[2] << 4) & 0xf0); + *z = (buf[5] << 8) | ((buf[4] << 4) & 0xf0); + break; + case MMA8451: + case MMA8452: + case MMA8453: + *x = (buf[0] << 8) | buf[1]; + *y = (buf[2] << 8) | buf[3]; + *z = (buf[4] << 8) | buf[5]; + break; + } + + switch (priv->type) { + case MMA8450: + case MMA8453: + *x >>= 4; + *y >>= 4; + *z >>= 4; + break; + case MMA8451: + *x >>= 2; + *y >>= 2; + *z >>= 2; + break; + case MMA8452: + *x >>= 3; + *y >>= 3; + *z >>= 3; + break; + } + + if (priv->mode == MODE_4G) { + *x <<= 1; + *y <<= 1; + *z <<= 1; + } else if (priv->mode == MODE_8G) { + *x <<= 2; + *y <<= 2; + *z <<= 2; + } + + return 0; +} + +static void mma845x_dev_poll(struct input_polled_dev *dev) +{ + struct mma845x_info *priv = dev->private; + + short x = -1, y = -1, z = -1; + int ret; + int reg_addr; + + mutex_lock(&mma845x_lock); + + reg_addr = get_ctrl_register(priv->type); + + do + ret = i2c_smbus_read_byte_data(priv->client, reg_addr); + while (!(ret & MMA845X_STATUS_ZYXDR)); + + ret = mma845x_read_data(priv, &x, &y, &z); + if (!ret) { + input_report_abs(priv->idev->input, ABS_X, x); + input_report_abs(priv->idev->input, ABS_Y, y); + input_report_abs(priv->idev->input, ABS_Z, z); + input_sync(priv->idev->input); + } + + mutex_unlock(&mma845x_lock); +} + +/* + * detecting which chip is on board. mma845x are have same i2c address, + * it's impossible exists multiple instance on same board. + */ +static int get_device_type(struct i2c_client *client) +{ + int ret; + /* high 2-bits of MMA8450_WHO_AM_I(0x0f) register on + * mma8451[2,3] will always zero, but MMA8450 Chip-ID's high + * 2-bits not zero */ + ret = i2c_smbus_read_byte_data(client, MMA8450_WHO_AM_I); + if (ret == MMA8450_ID) + return MMA8450; + ret = i2c_smbus_read_byte_data(client, MMA8451_WHO_AM_I); + switch (ret) { + case MMA8451_ID: + return MMA8451; + case MMA8452_ID: + return MMA8452; + case MMA8453_ID: + return MMA8453; + default: + return -EINVAL; + } +} + +static int __devinit mma845x_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret; + struct input_dev *input_idev; + struct i2c_adapter *adapter; + struct mma845x_info *priv; + + adapter = to_i2c_adapter(client->dev.parent); + ret = i2c_check_functionality(adapter, + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA); + if (!ret) + goto err_out; + + priv = kzalloc(sizeof(struct mma845x_info), GFP_KERNEL); + if (!priv) { + dev_err(&client->dev, "failed to alloc driver info\n"); + goto err_out; + } + + ret = get_device_type(client); + if (ret < 0) + goto err_out; + + priv->type = ret; + priv->client = client; + priv->mode = DEFAULT_SENSTIVE_MODE; + + dev_dbg(&client->dev, "found %s model accelerator\n", + get_mma845x_name(priv->type)); + + ret = init_mma845x_chip(priv); + + if (ret) { + dev_err(&client->dev, + "error when init %s chip:(%d)\n", + get_mma845x_name(priv->type), ret); + goto err_alloc_priv; + } + + priv->hwmon_dev = hwmon_device_register(&client->dev); + if (!priv->hwmon_dev) { + ret = -ENOMEM; + dev_err(&client->dev, + "error register hwmon device\n"); + goto err_alloc_priv; + } + + priv->idev = input_allocate_polled_device(); + if (!priv->idev) { + ret = -ENOMEM; + dev_err(&client->dev, "alloc poll device failed!\n"); + goto err_alloc_poll_device; + } + priv->idev->private = priv; + priv->idev->poll = mma845x_dev_poll; + priv->idev->poll_interval = POLL_INTERVAL; + priv->idev->poll_interval_min = POLL_INTERVAL_MIN; + priv->idev->poll_interval_max = POLL_INTERVAL_MAX; + + input_idev = priv->idev->input; + input_idev->name = get_mma845x_name(priv->type); + input_idev->id.bustype = BUS_I2C; + input_idev->evbit[0] = BIT_MASK(EV_ABS); + + input_set_abs_params(input_idev, ABS_X, -8192, 8191, + INPUT_FUZZ, INPUT_FLAT); + input_set_abs_params(input_idev, ABS_Y, -8192, 8191, + INPUT_FUZZ, INPUT_FLAT); + input_set_abs_params(input_idev, ABS_Z, -8192, 8191, + INPUT_FUZZ, INPUT_FLAT); + + ret = input_register_polled_device(priv->idev); + if (ret) { + dev_err(&client->dev, "register poll device failed!\n"); + goto err_register_polled_device; + } + + i2c_set_clientdata(client, priv); + dev_dbg(&client->dev, "%s accelerator init success\n", + get_mma845x_name(priv->type)); + + return 0; +err_register_polled_device: + input_free_polled_device(priv->idev); +err_alloc_poll_device: + hwmon_device_unregister(&client->dev); +err_alloc_priv: + kfree(priv); +err_out: + return ret; +} + +static int mma845x_stop_chip(struct i2c_client *client) +{ + struct mma845x_info *priv = i2c_get_clientdata(client); + int ret; + switch (priv->type) { + case MMA8450: + priv->ctl_reg = i2c_smbus_read_byte_data(client, + MMA8450_CTRL_REG1); + ret = i2c_smbus_write_byte_data(client, MMA8450_CTRL_REG1, + priv->ctl_reg & 0xFC); + break; + case MMA8451: + priv->ctl_reg = i2c_smbus_read_byte_data(client, + MMA8451_CTRL_REG1); + ret = i2c_smbus_write_byte_data(client, MMA8451_CTRL_REG1, + priv->ctl_reg & 0xFE); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int __devexit mma845x_remove(struct i2c_client *client) +{ + int ret; + struct mma845x_info *priv = i2c_get_clientdata(client); + ret = mma845x_stop_chip(client); + input_free_polled_device(priv->idev); + hwmon_device_unregister(priv->hwmon_dev); + + return ret; +} + +#ifdef CONFIG_PM_SLEEP +static int mma845x_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + + return mma845x_stop_chip(client); +} + +static int mma845x_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct mma845x_info *priv = i2c_get_clientdata(client); + + return init_mma845x_chip(priv); +} +#endif + +static const struct i2c_device_id mma845x_id[] = { + {"mma845x", 0}, +}; +MODULE_DEVICE_TABLE(i2c, mma845x_id); + +static SIMPLE_DEV_PM_OPS(mma845x_pm_ops, mma845x_suspend, mma845x_resume); +static struct i2c_driver mma845x_driver = { + .driver = { + .name = "mma845x", + .owner = THIS_MODULE, + .pm = &mma845x_pm_ops, + }, + .probe = mma845x_probe, + .remove = __devexit_p(mma845x_remove), + .id_table = mma845x_id, +}; + +static int __init mma845x_init(void) +{ + return i2c_add_driver(&mma845x_driver); +} + +static void __exit mma845x_exit(void) +{ + i2c_del_driver(&mma845x_driver); +} + +module_init(mma845x_init); +module_exit(mma845x_exit); + +MODULE_AUTHOR("Zhang Jiejing "); +MODULE_DESCRIPTION("Freescale MMA845x 3-axis gravity accelerator sensors"); +MODULE_LICENSE("GPL"); diff -urN linux-2.6.35.3.fsl/drivers/input/touchscreen/ads7846.c linux-2.6.35.3.work/drivers/input/touchscreen/ads7846.c --- linux-2.6.35.3.fsl/drivers/input/touchscreen/ads7846.c 2010-08-20 20:55:55.000000000 +0200 +++ linux-2.6.35.3.work/drivers/input/touchscreen/ads7846.c 2015-11-22 16:44:14.975616903 +0100 @@ -1160,7 +1160,7 @@ m->context = ts; ts->last_msg = m; - +/* ts->reg = regulator_get(&spi->dev, "vcc"); if (IS_ERR(ts->reg)) { err = PTR_ERR(ts->reg); @@ -1173,7 +1173,7 @@ dev_err(&spi->dev, "unable to enable regulator: %d\n", err); goto err_put_regulator; } - +*/ if (request_irq(spi->irq, ads7846_irq, IRQF_TRIGGER_FALLING, spi->dev.driver->name, ts)) { dev_info(&spi->dev, diff -urN linux-2.6.35.3.fsl/drivers/input/touchscreen/edt-ft5x06.c linux-2.6.35.3.work/drivers/input/touchscreen/edt-ft5x06.c --- linux-2.6.35.3.fsl/drivers/input/touchscreen/edt-ft5x06.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.35.3.work/drivers/input/touchscreen/edt-ft5x06.c 2015-11-22 16:44:14.975616903 +0100 @@ -0,0 +1,915 @@ +/* + * Copyright (C) 2012 Simon Budig, + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * This is a driver for the EDT "Polytouch" family of touch controllers + * based on the FocalTech FT5x06 line of chips. + * + * Development of this driver has been sponsored by Glyn: + * http://www.glyn.com/Products/Displays + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define dev_err_ratelimited dev_err + +#define MAX_SUPPORT_POINTS 5 + +#define WORK_REGISTER_THRESHOLD 0x00 +#define WORK_REGISTER_REPORT_RATE 0x08 +#define WORK_REGISTER_GAIN 0x30 +#define WORK_REGISTER_OFFSET 0x31 +#define WORK_REGISTER_NUM_X 0x33 +#define WORK_REGISTER_NUM_Y 0x34 + +#define WORK_REGISTER_OPMODE 0x3c +#define FACTORY_REGISTER_OPMODE 0x01 + +#define TOUCH_EVENT_DOWN 0x00 +#define TOUCH_EVENT_UP 0x01 +#define TOUCH_EVENT_ON 0x02 +#define TOUCH_EVENT_RESERVED 0x03 + +#define EDT_NAME_LEN 23 +#define EDT_SWITCH_MODE_RETRIES 10 +#define EDT_SWITCH_MODE_DELAY 5 /* msec */ +#define EDT_RAW_DATA_RETRIES 100 +#define EDT_RAW_DATA_DELAY 1 /* msec */ + +struct edt_ft5x06_ts_data { + struct i2c_client *client; + struct input_dev *input; + u16 num_x; + u16 num_y; + +#if defined(CONFIG_DEBUG_FS) + struct dentry *debug_dir; + u8 *raw_buffer; + size_t raw_bufsize; +#endif + + struct mutex mutex; + bool factory_mode; + int threshold; + int gain; + int offset; + int report_rate; + + char name[EDT_NAME_LEN]; +}; + +static int edt_ft5x06_ts_readwrite(struct i2c_client *client, + u16 wr_len, u8 *wr_buf, + u16 rd_len, u8 *rd_buf) +{ + struct i2c_msg wrmsg[2]; + int i = 0; + int ret; + + if (wr_len) { + wrmsg[i].addr = client->addr; + wrmsg[i].flags = 0; + wrmsg[i].len = wr_len; + wrmsg[i].buf = wr_buf; + i++; + } + if (rd_len) { + wrmsg[i].addr = client->addr; + wrmsg[i].flags = I2C_M_RD; + wrmsg[i].len = rd_len; + wrmsg[i].buf = rd_buf; + i++; + } + + ret = i2c_transfer(client->adapter, wrmsg, i); + if (ret < 0) + return ret; + if (ret != i) + return -EIO; + + return 0; +} + +static bool edt_ft5x06_ts_check_crc(struct edt_ft5x06_ts_data *tsdata, + u8 *buf, int buflen) +{ + int i; + u8 crc = 0; + + for (i = 0; i < buflen - 1; i++) + crc ^= buf[i]; + + if (crc != buf[buflen-1]) { + dev_err_ratelimited(&tsdata->client->dev, + "crc error: 0x%02x expected, got 0x%02x\n", + crc, buf[buflen-1]); + return false; + } + + return true; +} + +static irqreturn_t edt_ft5x06_ts_isr(int irq, void *dev_id) +{ + struct edt_ft5x06_ts_data *tsdata = dev_id; + struct device *dev = &tsdata->client->dev; + u8 cmd = 0xf9; + u8 rdbuf[26]; + int i, type, x, y, id; + int error, down; + + memset(rdbuf, 0, sizeof(rdbuf)); + + error = edt_ft5x06_ts_readwrite(tsdata->client, + sizeof(cmd), &cmd, + sizeof(rdbuf), rdbuf); + if (error) { + dev_err_ratelimited(dev, "Unable to fetch data, error: %d\n", + error); + goto out; + } + + if (rdbuf[0] != 0xaa || rdbuf[1] != 0xaa || rdbuf[2] != 26) { + dev_err_ratelimited(dev, "Unexpected header: %02x%02x%02x!\n", + rdbuf[0], rdbuf[1], rdbuf[2]); + goto out; + } + + if (!edt_ft5x06_ts_check_crc(tsdata, rdbuf, 26)) + goto out; + + down = 0; + + for (i = 0; i < MAX_SUPPORT_POINTS; i++) { + u8 *buf = &rdbuf[i * 4 + 5]; + + type = buf[0] >> 6; + /* ignore Reserved events */ + if (type == TOUCH_EVENT_RESERVED) + continue; + + x = ((buf[0] << 8) | buf[1]) & 0x0fff; + y = ((buf[2] << 8) | buf[3]) & 0x0fff; + id = (buf[2] >> 4) & 0x0f; + + if(type == TOUCH_EVENT_UP) + continue; + + input_report_abs(tsdata->input, ABS_MT_TRACKING_ID, id); + input_report_abs(tsdata->input, ABS_MT_POSITION_X, x); + input_report_abs(tsdata->input, ABS_MT_POSITION_Y, y); + input_mt_sync(tsdata->input); + + if( id == 0) { + input_report_abs(tsdata->input, ABS_X, x); + input_report_abs(tsdata->input, ABS_Y, y); + } + + down++; + } + input_report_key(tsdata->input, BTN_TOUCH, (down > 0)); + input_sync(tsdata->input); +out: + return IRQ_HANDLED; +} + +static int edt_ft5x06_register_write(struct edt_ft5x06_ts_data *tsdata, + u8 addr, u8 value) +{ + u8 wrbuf[4]; + + wrbuf[0] = tsdata->factory_mode ? 0xf3 : 0xfc; + wrbuf[1] = tsdata->factory_mode ? addr & 0x7f : addr & 0x3f; + wrbuf[2] = value; + wrbuf[3] = wrbuf[0] ^ wrbuf[1] ^ wrbuf[2]; + + return edt_ft5x06_ts_readwrite(tsdata->client, 4, wrbuf, 0, NULL); +} + +static int edt_ft5x06_register_read(struct edt_ft5x06_ts_data *tsdata, + u8 addr) +{ + u8 wrbuf[2], rdbuf[2]; + int error; + + wrbuf[0] = tsdata->factory_mode ? 0xf3 : 0xfc; + wrbuf[1] = tsdata->factory_mode ? addr & 0x7f : addr & 0x3f; + wrbuf[1] |= tsdata->factory_mode ? 0x80 : 0x40; + + error = edt_ft5x06_ts_readwrite(tsdata->client, 2, wrbuf, 2, rdbuf); + if (error) + return error; + + if ((wrbuf[0] ^ wrbuf[1] ^ rdbuf[0]) != rdbuf[1]) { + dev_err(&tsdata->client->dev, + "crc error: 0x%02x expected, got 0x%02x\n", + wrbuf[0] ^ wrbuf[1] ^ rdbuf[0], rdbuf[1]); + return -EIO; + } + + return rdbuf[0]; +} + +struct edt_ft5x06_attribute { + struct device_attribute dattr; + size_t field_offset; + u8 limit_low; + u8 limit_high; + u8 addr; +}; + +#define EDT_ATTR(_field, _mode, _addr, _limit_low, _limit_high) \ + struct edt_ft5x06_attribute edt_ft5x06_attr_##_field = { \ + .dattr = __ATTR(_field, _mode, \ + edt_ft5x06_setting_show, \ + edt_ft5x06_setting_store), \ + .field_offset = \ + offsetof(struct edt_ft5x06_ts_data, _field), \ + .limit_low = _limit_low, \ + .limit_high = _limit_high, \ + .addr = _addr, \ + } + +static ssize_t edt_ft5x06_setting_show(struct device *dev, + struct device_attribute *dattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client); + struct edt_ft5x06_attribute *attr = + container_of(dattr, struct edt_ft5x06_attribute, dattr); + u8 *field = (u8 *)((char *)tsdata + attr->field_offset); + int val; + size_t count = 0; + int error = 0; + + mutex_lock(&tsdata->mutex); + + if (tsdata->factory_mode) { + error = -EIO; + goto out; + } + + val = edt_ft5x06_register_read(tsdata, attr->addr); + if (val < 0) { + error = val; + dev_err(&tsdata->client->dev, + "Failed to fetch attribute %s, error %d\n", + dattr->attr.name, error); + goto out; + } + + if (val != *field) { + dev_warn(&tsdata->client->dev, + "%s: read (%d) and stored value (%d) differ\n", + dattr->attr.name, val, *field); + *field = val; + } + + count = scnprintf(buf, PAGE_SIZE, "%d\n", val); +out: + mutex_unlock(&tsdata->mutex); + return error ?: count; +} + +static ssize_t edt_ft5x06_setting_store(struct device *dev, + struct device_attribute *dattr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client); + struct edt_ft5x06_attribute *attr = + container_of(dattr, struct edt_ft5x06_attribute, dattr); + u8 *field = (u8 *)((char *)tsdata + attr->field_offset); + unsigned int val; + int error; + + mutex_lock(&tsdata->mutex); + + if (tsdata->factory_mode) { + error = -EIO; + goto out; + } + + val = simple_strtoull(buf, NULL, 0); + + if (val < attr->limit_low || val > attr->limit_high) { + error = -ERANGE; + goto out; + } + + error = edt_ft5x06_register_write(tsdata, attr->addr, val); + if (error) { + dev_err(&tsdata->client->dev, + "Failed to update attribute %s, error: %d\n", + dattr->attr.name, error); + goto out; + } + + *field = val; + +out: + mutex_unlock(&tsdata->mutex); + return error ?: count; +} + +static EDT_ATTR(gain, S_IWUSR | S_IRUGO, WORK_REGISTER_GAIN, 0, 31); +static EDT_ATTR(offset, S_IWUSR | S_IRUGO, WORK_REGISTER_OFFSET, 0, 31); +static EDT_ATTR(threshold, S_IWUSR | S_IRUGO, + WORK_REGISTER_THRESHOLD, 20, 80); +static EDT_ATTR(report_rate, S_IWUSR | S_IRUGO, + WORK_REGISTER_REPORT_RATE, 3, 14); + +static struct attribute *edt_ft5x06_attrs[] = { + &edt_ft5x06_attr_gain.dattr.attr, + &edt_ft5x06_attr_offset.dattr.attr, + &edt_ft5x06_attr_threshold.dattr.attr, + &edt_ft5x06_attr_report_rate.dattr.attr, + NULL +}; + +static const struct attribute_group edt_ft5x06_attr_group = { + .attrs = edt_ft5x06_attrs, +}; + +#ifdef CONFIG_DEBUG_FS +static int edt_ft5x06_factory_mode(struct edt_ft5x06_ts_data *tsdata) +{ + struct i2c_client *client = tsdata->client; + int retries = EDT_SWITCH_MODE_RETRIES; + int ret; + int error; + + disable_irq(client->irq); + + if (!tsdata->raw_buffer) { + tsdata->raw_bufsize = tsdata->num_x * tsdata->num_y * + sizeof(u16); + tsdata->raw_buffer = kzalloc(tsdata->raw_bufsize, GFP_KERNEL); + if (!tsdata->raw_buffer) { + error = -ENOMEM; + goto err_out; + } + } + + /* mode register is 0x3c when in the work mode */ + error = edt_ft5x06_register_write(tsdata, WORK_REGISTER_OPMODE, 0x03); + if (error) { + dev_err(&client->dev, + "failed to switch to factory mode, error %d\n", error); + goto err_out; + } + + tsdata->factory_mode = true; + do { + mdelay(EDT_SWITCH_MODE_DELAY); + /* mode register is 0x01 when in factory mode */ + ret = edt_ft5x06_register_read(tsdata, FACTORY_REGISTER_OPMODE); + if (ret == 0x03) + break; + } while (--retries > 0); + + if (retries == 0) { + dev_err(&client->dev, "not in factory mode after %dms.\n", + EDT_SWITCH_MODE_RETRIES * EDT_SWITCH_MODE_DELAY); + error = -EIO; + goto err_out; + } + + return 0; + +err_out: + kfree(tsdata->raw_buffer); + tsdata->raw_buffer = NULL; + tsdata->factory_mode = false; + enable_irq(client->irq); + + return error; +} + +static int edt_ft5x06_work_mode(struct edt_ft5x06_ts_data *tsdata) +{ + struct i2c_client *client = tsdata->client; + int retries = EDT_SWITCH_MODE_RETRIES; + int ret; + int error; + + /* mode register is 0x01 when in the factory mode */ + error = edt_ft5x06_register_write(tsdata, FACTORY_REGISTER_OPMODE, 0x1); + if (error) { + dev_err(&client->dev, + "failed to switch to work mode, error: %d\n", error); + return error; + } + + tsdata->factory_mode = false; + + do { + mdelay(EDT_SWITCH_MODE_DELAY); + /* mode register is 0x01 when in factory mode */ + ret = edt_ft5x06_register_read(tsdata, WORK_REGISTER_OPMODE); + if (ret == 0x01) + break; + } while (--retries > 0); + + if (retries == 0) { + dev_err(&client->dev, "not in work mode after %dms.\n", + EDT_SWITCH_MODE_RETRIES * EDT_SWITCH_MODE_DELAY); + tsdata->factory_mode = true; + return -EIO; + } + + if (tsdata->raw_buffer) + kfree(tsdata->raw_buffer); + tsdata->raw_buffer = NULL; + + /* restore parameters */ + edt_ft5x06_register_write(tsdata, WORK_REGISTER_THRESHOLD, + tsdata->threshold); + edt_ft5x06_register_write(tsdata, WORK_REGISTER_GAIN, + tsdata->gain); + edt_ft5x06_register_write(tsdata, WORK_REGISTER_OFFSET, + tsdata->offset); + edt_ft5x06_register_write(tsdata, WORK_REGISTER_REPORT_RATE, + tsdata->report_rate); + + enable_irq(client->irq); + + return 0; +} + +static int edt_ft5x06_debugfs_mode_get(void *data, u64 *mode) +{ + struct edt_ft5x06_ts_data *tsdata = data; + + *mode = tsdata->factory_mode; + + return 0; +}; + +static int edt_ft5x06_debugfs_mode_set(void *data, u64 mode) +{ + struct edt_ft5x06_ts_data *tsdata = data; + int retval = 0; + + if (mode > 1) + return -ERANGE; + + mutex_lock(&tsdata->mutex); + + if (mode != tsdata->factory_mode) { + retval = mode ? edt_ft5x06_factory_mode(tsdata) : + edt_ft5x06_work_mode(tsdata); + } + + mutex_unlock(&tsdata->mutex); + + return retval; +}; + +DEFINE_SIMPLE_ATTRIBUTE(debugfs_mode_fops, edt_ft5x06_debugfs_mode_get, + edt_ft5x06_debugfs_mode_set, "%llu\n"); + +static int edt_ft5x06_debugfs_raw_data_open(struct inode *inode, + struct file *file) +{ + file->private_data = inode->i_private; + + return 0; +} + +static ssize_t edt_ft5x06_debugfs_raw_data_read(struct file *file, + char __user *buf, size_t count, loff_t *off) +{ + struct edt_ft5x06_ts_data *tsdata = file->private_data; + struct i2c_client *client = tsdata->client; + int retries = EDT_RAW_DATA_RETRIES; + int val, i, error; + size_t read = 0; + int colbytes; + char wrbuf[3]; + u8 *rdbuf; + + if (*off < 0 || *off >= tsdata->raw_bufsize) + return 0; + + mutex_lock(&tsdata->mutex); + + if (!tsdata->factory_mode || !tsdata->raw_buffer) { + error = -EIO; + goto out; + } + + error = edt_ft5x06_register_write(tsdata, 0x08, 0x01); + if (error) { + dev_dbg(&client->dev, + "failed to write 0x08 register, error %d\n", error); + goto out; + } + + do { + msleep(EDT_RAW_DATA_DELAY); + val = edt_ft5x06_register_read(tsdata, 0x08); + if (val < 1) + break; + } while (--retries > 0); + + if (val < 0) { + error = val; + dev_dbg(&client->dev, + "failed to read 0x08 register, error %d\n", error); + goto out; + } + + if (retries == 0) { + dev_dbg(&client->dev, + "timed out waiting for register to settle\n"); + error = -ETIMEDOUT; + goto out; + } + + rdbuf = tsdata->raw_buffer; + colbytes = tsdata->num_y * sizeof(u16); + + wrbuf[0] = 0xf5; + wrbuf[1] = 0x0e; + for (i = 0; i < tsdata->num_x; i++) { + wrbuf[2] = i; /* column index */ + error = edt_ft5x06_ts_readwrite(tsdata->client, + sizeof(wrbuf), wrbuf, + colbytes, rdbuf); + if (error) + goto out; + + rdbuf += colbytes; + } + + read = min_t(size_t, count, tsdata->raw_bufsize - *off); + if (copy_to_user(buf, tsdata->raw_buffer + *off, read)) { + error = -EFAULT; + goto out; + } + + *off += read; +out: + mutex_unlock(&tsdata->mutex); + return error ?: read; +}; + + +static const struct file_operations debugfs_raw_data_fops = { + .open = edt_ft5x06_debugfs_raw_data_open, + .read = edt_ft5x06_debugfs_raw_data_read, +}; + +static void __devinit +edt_ft5x06_ts_prepare_debugfs(struct edt_ft5x06_ts_data *tsdata, + const char *debugfs_name) +{ + tsdata->debug_dir = debugfs_create_dir(debugfs_name, NULL); + if (!tsdata->debug_dir) + return; + + debugfs_create_u16("num_x", S_IRUSR, tsdata->debug_dir, &tsdata->num_x); + debugfs_create_u16("num_y", S_IRUSR, tsdata->debug_dir, &tsdata->num_y); + + debugfs_create_file("mode", S_IRUSR | S_IWUSR, + tsdata->debug_dir, tsdata, &debugfs_mode_fops); + debugfs_create_file("raw_data", S_IRUSR, + tsdata->debug_dir, tsdata, &debugfs_raw_data_fops); +} + +static void __devexit +edt_ft5x06_ts_teardown_debugfs(struct edt_ft5x06_ts_data *tsdata) +{ + if (tsdata->debug_dir) + debugfs_remove_recursive(tsdata->debug_dir); + kfree(tsdata->raw_buffer); +} + +#else + +static inline void +edt_ft5x06_ts_prepare_debugfs(struct edt_ft5x06_ts_data *tsdata, + const char *debugfs_name) +{ +} + +static inline void +edt_ft5x06_ts_teardown_debugfs(struct edt_ft5x06_ts_data *tsdata) +{ +} + +#endif /* CONFIG_DEBUGFS */ + + + +static int __devinit edt_ft5x06_ts_reset(struct i2c_client *client, + int reset_pin) +{ + int error; + + if (gpio_is_valid(reset_pin)) { + /* this pulls reset down, enabling the low active reset */ + error = gpio_request_one(reset_pin, GPIOF_OUT_INIT_LOW, + "edt-ft5x06 reset"); + if (error) { + dev_err(&client->dev, + "Failed to request GPIO %d as reset pin, error %d\n", + reset_pin, error); + return error; + } + + mdelay(50); + gpio_set_value(reset_pin, 1); + mdelay(100); + } + + return 0; +} + +static int __devinit edt_ft5x06_ts_identify(struct i2c_client *client, + char *model_name, + char *fw_version) +{ + u8 rdbuf[EDT_NAME_LEN]; + char *p; + int error; + + error = edt_ft5x06_ts_readwrite(client, 1, "\xbb", + EDT_NAME_LEN - 1, rdbuf); + if (error) + return error; + + /* remove last '$' end marker */ + rdbuf[EDT_NAME_LEN - 1] = '\0'; + if (rdbuf[EDT_NAME_LEN - 2] == '$') + rdbuf[EDT_NAME_LEN - 2] = '\0'; + + /* look for Model/Version separator */ + p = strchr(rdbuf, '*'); + if (p) + *p++ = '\0'; + + strlcpy(model_name, rdbuf + 1, EDT_NAME_LEN); + strlcpy(fw_version, p ? p : "", EDT_NAME_LEN); + + return 0; +} + +#define EDT_ATTR_CHECKSET(name, reg) \ + if (pdata->name >= edt_ft5x06_attr_##name.limit_low && \ + pdata->name <= edt_ft5x06_attr_##name.limit_high) \ + edt_ft5x06_register_write(tsdata, reg, pdata->name) + +static void __devinit +edt_ft5x06_ts_get_defaults(struct edt_ft5x06_ts_data *tsdata, + const struct edt_ft5x06_platform_data *pdata) +{ + if (!pdata->use_parameters) + return; + + /* pick up defaults from the platform data */ + EDT_ATTR_CHECKSET(threshold, WORK_REGISTER_THRESHOLD); + EDT_ATTR_CHECKSET(gain, WORK_REGISTER_GAIN); + EDT_ATTR_CHECKSET(offset, WORK_REGISTER_OFFSET); + EDT_ATTR_CHECKSET(report_rate, WORK_REGISTER_REPORT_RATE); +} + +static void __devinit +edt_ft5x06_ts_get_parameters(struct edt_ft5x06_ts_data *tsdata) +{ + tsdata->threshold = edt_ft5x06_register_read(tsdata, + WORK_REGISTER_THRESHOLD); + tsdata->gain = edt_ft5x06_register_read(tsdata, WORK_REGISTER_GAIN); + tsdata->offset = edt_ft5x06_register_read(tsdata, WORK_REGISTER_OFFSET); + tsdata->report_rate = edt_ft5x06_register_read(tsdata, + WORK_REGISTER_REPORT_RATE); + tsdata->num_x = edt_ft5x06_register_read(tsdata, WORK_REGISTER_NUM_X); + tsdata->num_y = edt_ft5x06_register_read(tsdata, WORK_REGISTER_NUM_Y); +} + +static int __devinit edt_ft5x06_ts_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + const struct edt_ft5x06_platform_data *pdata = + client->dev.platform_data; + struct edt_ft5x06_ts_data *tsdata; + struct input_dev *input; + int error; + char fw_version[EDT_NAME_LEN]; + + dev_dbg(&client->dev, "probing for EDT FT5x06 I2C\n"); + + if (!pdata) { + dev_err(&client->dev, "no platform data?\n"); + return -EINVAL; + } + + error = edt_ft5x06_ts_reset(client, pdata->reset_pin); + if (error) + return error; + + if (gpio_is_valid(pdata->irq_pin)) { + error = gpio_request_one(pdata->irq_pin, + GPIOF_IN, "edt-ft5x06 irq"); + if (error) { + dev_err(&client->dev, + "Failed to request GPIO %d, error %d\n", + pdata->irq_pin, error); + return error; + } + } + + tsdata = kzalloc(sizeof(*tsdata), GFP_KERNEL); + input = input_allocate_device(); + if (!tsdata || !input) { + dev_err(&client->dev, "failed to allocate driver data.\n"); + error = -ENOMEM; + goto err_free_mem; + } + + mutex_init(&tsdata->mutex); + tsdata->client = client; + tsdata->input = input; + tsdata->factory_mode = false; + + error = edt_ft5x06_ts_identify(client, tsdata->name, fw_version); + if (error) { + dev_err(&client->dev, "touchscreen probe failed\n"); + goto err_free_mem; + } + + edt_ft5x06_ts_get_defaults(tsdata, pdata); + edt_ft5x06_ts_get_parameters(tsdata); + + dev_dbg(&client->dev, + "Model \"%s\", Rev. \"%s\", %dx%d sensors\n", + tsdata->name, fw_version, tsdata->num_x, tsdata->num_y); + + input->name = tsdata->name; + input->id.bustype = BUS_I2C; + input->dev.parent = &client->dev; + + __set_bit(EV_SYN, input->evbit); + __set_bit(EV_KEY, input->evbit); + __set_bit(EV_ABS, input->evbit); + __set_bit(BTN_TOUCH, input->keybit); + + input_set_abs_params(input, ABS_MT_TRACKING_ID, + 0, MAX_SUPPORT_POINTS - 1, 0, 0); + input_set_abs_params(input, ABS_MT_POSITION_X, + 0, tsdata->num_x * 64 - 1, 0, 0); + input_set_abs_params(input, ABS_MT_POSITION_Y, + 0, tsdata->num_y * 64 - 1, 0, 0); + + input_set_abs_params(input, ABS_X, 0, tsdata->num_x * 64 - 1, 0, 0); + input_set_abs_params(input, ABS_Y, 0, tsdata->num_y * 64 - 1, 0, 0); + + input_set_drvdata(input, tsdata); + i2c_set_clientdata(client, tsdata); + + error = request_threaded_irq(client->irq, NULL, edt_ft5x06_ts_isr, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + client->name, tsdata); + if (error) { + dev_err(&client->dev, "Unable to request touchscreen IRQ.\n"); + goto err_free_mem; + } + + error = sysfs_create_group(&client->dev.kobj, &edt_ft5x06_attr_group); + if (error) + goto err_free_irq; + + error = input_register_device(input); + if (error) + goto err_remove_attrs; + + edt_ft5x06_ts_prepare_debugfs(tsdata, dev_driver_string(&client->dev)); + device_init_wakeup(&client->dev, 1); + + dev_dbg(&client->dev, + "EDT FT5x06 initialized: IRQ pin %d, Reset pin %d.\n", + pdata->irq_pin, pdata->reset_pin); + + return 0; + +err_remove_attrs: + sysfs_remove_group(&client->dev.kobj, &edt_ft5x06_attr_group); +err_free_irq: + free_irq(client->irq, tsdata); +err_free_mem: + input_free_device(input); + kfree(tsdata); + + if (gpio_is_valid(pdata->irq_pin)) + gpio_free(pdata->irq_pin); + + return error; +} + +static int __devexit edt_ft5x06_ts_remove(struct i2c_client *client) +{ + const struct edt_ft5x06_platform_data *pdata = + dev_get_platdata(&client->dev); + struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client); + + edt_ft5x06_ts_teardown_debugfs(tsdata); + sysfs_remove_group(&client->dev.kobj, &edt_ft5x06_attr_group); + + free_irq(client->irq, tsdata); + input_unregister_device(tsdata->input); + + if (gpio_is_valid(pdata->irq_pin)) + gpio_free(pdata->irq_pin); + if (gpio_is_valid(pdata->reset_pin)) + gpio_free(pdata->reset_pin); + + kfree(tsdata); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int edt_ft5x06_ts_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + + if (device_may_wakeup(dev)) + enable_irq_wake(client->irq); + + return 0; +} + +static int edt_ft5x06_ts_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + + if (device_may_wakeup(dev)) + disable_irq_wake(client->irq); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(edt_ft5x06_ts_pm_ops, + edt_ft5x06_ts_suspend, edt_ft5x06_ts_resume); + +static const struct i2c_device_id edt_ft5x06_ts_id[] = { + { "edt-ft5x06", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, edt_ft5x06_ts_id); + +static struct i2c_driver edt_ft5x06_ts_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "edt-ft5x06", + .pm = &edt_ft5x06_ts_pm_ops, + }, + .id_table = edt_ft5x06_ts_id, + .probe = edt_ft5x06_ts_probe, + .remove = __devexit_p(edt_ft5x06_ts_remove), +}; + +static int __init edt_ft5x06_ts_init(void) +{ + return i2c_add_driver(&edt_ft5x06_ts_driver); +} + +static void __exit edt_ft5x06_ts_exit(void) +{ + i2c_del_driver(&edt_ft5x06_ts_driver); +} + +module_init(edt_ft5x06_ts_init); +module_exit(edt_ft5x06_ts_exit); + + +MODULE_AUTHOR("Simon Budig "); +MODULE_DESCRIPTION("EDT FT5x06 I2C Touchscreen Driver"); +MODULE_LICENSE("GPL"); diff -urN linux-2.6.35.3.fsl/drivers/input/touchscreen/Kconfig linux-2.6.35.3.work/drivers/input/touchscreen/Kconfig --- linux-2.6.35.3.fsl/drivers/input/touchscreen/Kconfig 2015-11-23 20:06:25.595833712 +0100 +++ linux-2.6.35.3.work/drivers/input/touchscreen/Kconfig 2015-11-22 16:44:14.975616903 +0100 @@ -11,6 +11,19 @@ if INPUT_TOUCHSCREEN +config TOUCHSCREEN_EDT_FT5X06 + tristate "EDT FocalTech FT5x06 I2C Touchscreen support" + depends on I2C + help + Say Y here if you have an EDT "Polytouch" touchscreen based + on the FocalTech FT5x06 family of controllers connected to + your system. + + If unsure, say N. + + To compile this driver as a module, choose M here: the + module will be called edt-ft5x06. + config TOUCHSCREEN_88PM860X tristate "Marvell 88PM860x touchscreen" depends on MFD_88PM860X diff -urN linux-2.6.35.3.fsl/drivers/input/touchscreen/Makefile linux-2.6.35.3.work/drivers/input/touchscreen/Makefile --- linux-2.6.35.3.fsl/drivers/input/touchscreen/Makefile 2015-11-23 20:06:25.599833712 +0100 +++ linux-2.6.35.3.work/drivers/input/touchscreen/Makefile 2015-11-22 16:44:14.979616903 +0100 @@ -6,6 +6,7 @@ wm97xx-ts-y := wm97xx-core.o +obj-$(CONFIG_TOUCHSCREEN_EDT_FT5X06) += edt-ft5x06.o obj-$(CONFIG_TOUCHSCREEN_88PM860X) += 88pm860x-ts.o obj-$(CONFIG_TOUCHSCREEN_AD7877) += ad7877.o obj-$(CONFIG_TOUCHSCREEN_AD7879) += ad7879.o diff -urN linux-2.6.35.3.fsl/drivers/media/radio/Kconfig linux-2.6.35.3.work/drivers/media/radio/Kconfig --- linux-2.6.35.3.fsl/drivers/media/radio/Kconfig 2010-08-20 20:55:55.000000000 +0200 +++ linux-2.6.35.3.work/drivers/media/radio/Kconfig 2015-11-22 16:44:14.979616903 +0100 @@ -452,4 +452,14 @@ found behind the Timberdale FPGA on the Russellville board. Enabling this driver will automatically select the DSP and tuner. +config RADIO_SI4705 + tristate "SI4705 I2C FM radio support" + depends on I2C && VIDEO_V4L2 + ---help--- + Say Y here if you want to use the SI4705 FM chip found in + voipac dev kits. This FM chip is connected to I2C bus. + + To compile this driver as a module, choose M here: the + module will be called radio-si4705. + endif # RADIO_ADAPTERS diff -urN linux-2.6.35.3.fsl/drivers/media/radio/Makefile linux-2.6.35.3.work/drivers/media/radio/Makefile --- linux-2.6.35.3.fsl/drivers/media/radio/Makefile 2010-08-20 20:55:55.000000000 +0200 +++ linux-2.6.35.3.work/drivers/media/radio/Makefile 2015-11-22 16:44:14.979616903 +0100 @@ -26,5 +26,6 @@ obj-$(CONFIG_RADIO_SAA7706H) += saa7706h.o obj-$(CONFIG_RADIO_TEF6862) += tef6862.o obj-$(CONFIG_RADIO_TIMBERDALE) += radio-timb.o +obj-$(CONFIG_RADIO_SI4705) += radio-si4705.o EXTRA_CFLAGS += -Isound diff -urN linux-2.6.35.3.fsl/drivers/media/radio/radio-si4705.c linux-2.6.35.3.work/drivers/media/radio/radio-si4705.c --- linux-2.6.35.3.fsl/drivers/media/radio/radio-si4705.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.35.3.work/drivers/media/radio/radio-si4705.c 2015-11-22 16:44:14.979616903 +0100 @@ -0,0 +1,1008 @@ +/* + * driver/media/radio/radio-si4705.c + * + * Driver for SI4705 radio chip for linux 2.6. + * This driver is for SI4705 chip from Silicon Labs. + * The I2C protocol is used for communicate with chip. + * + * Based in radio-tea5764.c Copyright (C) 2008 Fabio Belavenuto + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * History: + * 2010-11-10 masu + * initial code + * + * TODO: + * add RDS support - partialy + * add power on/off detection test in fuctions ? + */ + +#include +#include +#include +#include /* Initdata */ +#include /* kernel radio structs */ +#include /* I2C */ +#include +#include +#include /* for KERNEL_VERSION MACRO */ + +#include +#include +#include +#include + +#include "radio-si4705.h" + +/* Module Parameters */ +/* Radio Nr */ +static int radio_nr = -1; +module_param(radio_nr, int, 0444); +MODULE_PARM_DESC(radio_nr, "Video4linux device number to use"); + +/* RDS buffer blocks */ +static unsigned int rds_buf = 80; +module_param(rds_buf, uint, 0444); +MODULE_PARM_DESC(rds_buf, "RDS buffer entries: *100*"); + +/* RDS maximum block errors */ +static unsigned short max_rds_errors = 1; +/* 0 means 0 errors requiring correction */ +/* 1 means 1-2 errors requiring correction (used by original USBRadio.exe) */ +/* 2 means 3-5 errors requiring correction */ +/* 3 means 6+ errors or errors in checkword, correction not possible */ +module_param(max_rds_errors, ushort, 0644); +MODULE_PARM_DESC(max_rds_errors, "RDS maximum block errors: *1*"); + +/* I2C code related */ +static unsigned i2c_timeout = 125; + +struct si4705_device { + struct i2c_client *i2c_client; + struct video_device *videodev; + struct si4705_reg reg; + struct si4705_property reg_property; + struct mutex mutex; + int users; + + /* RDS receive buffer */ + wait_queue_head_t read_queue; + unsigned char *buffer; + unsigned int buf_size; + unsigned int rd_index; + unsigned int wr_index; + + struct work_struct radio_work; +}; + +/* + * si4705_do_i2c_cmd - read register + */ +int si4705_do_i2c_cmd(struct si4705_device *radio, u8 * txdata, u8 txsize, u8 * rxdata, u8 rxsize) +{ + int status = 0; + unsigned long timeout, read_time; +// struct i2c_msg msgs[2] = { +// { radio->i2c_client->addr, 0, txsize, (u8 *) txdata }, +// { radio->i2c_client->addr, I2C_M_RD, rxsize, (u8 *) rxdata }, +// }; + struct i2c_msg tmsgs[1] = { + { radio->i2c_client->addr, 0, txsize, (u8 *) txdata }, + }; + struct i2c_msg rmsgs[1] = { + { radio->i2c_client->addr, I2C_M_RD, rxsize, (u8 *) rxdata }, + }; + + // write + timeout = jiffies + msecs_to_jiffies(i2c_timeout); + do { + read_time = jiffies; + status = i2c_transfer(radio->i2c_client->adapter, tmsgs, 1); + + // REVISIT: at HZ=100, this is sloooow + msleep(1); + } while (time_before(read_time, timeout) && status != 1); + + if (status != 1) + return -EIO; + + //read + timeout = jiffies + msecs_to_jiffies(i2c_timeout); + do { + read_time = jiffies; + status = i2c_transfer(radio->i2c_client->adapter, rmsgs, 1); + + // REVISIT: at HZ=100, this is sloooow + msleep(1); + } while (time_before(read_time, timeout) && !(rxdata[0] & SI4705_STS_CTS)); + + if (status != 1) + return -EIO; + + return 0; +} + +int si4705_get_property(struct si4705_device * radio, u16 prop_cmd, u16 * property) { + u8 txdata[4]; + u8 rxdata[4] = {0, 0, 0, 0}; + u8 txsize = 0, rxsize = 4; + int ret; + + txdata[txsize++] = si4705_cmd.GET_PROPERTY; + txdata[txsize++] = 0; + txdata[txsize++] = prop_cmd >> 8; + txdata[txsize++] = prop_cmd; + + ret = si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize); + + *property = (rxdata[2] << 8) + rxdata[3]; + + return ret; +} + +int si4705_set_property(struct si4705_device * radio, u16 prop_cmd, u16 property) { + u8 txdata[6]; + u8 rxdata[1] = {0}; + u8 txsize = 0, rxsize = 1; + int ret; + + txdata[txsize++] = si4705_cmd.SET_PROPERTY; + txdata[txsize++] = 0; + txdata[txsize++] = prop_cmd >> 8; + txdata[txsize++] = prop_cmd; + txdata[txsize++] = property >> 8; + txdata[txsize++] = property; + + ret = si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize); + + return ret; +} + +int si4705_get_all_properties(struct si4705_device *radio) { + int ret = 0; + + ret |= si4705_get_property(radio, si4705_prop_cmd.GPO_IEN, &(radio->reg_property.gpo_ien)); + ret |= si4705_get_property(radio, si4705_prop_cmd.DIGITAL_OUTPUT_FORMAT, &(radio->reg_property.digital_output_format)); + ret |= si4705_get_property(radio, si4705_prop_cmd.DIGITAL_OUTPUT_SAMPLE_RATE, &(radio->reg_property.digital_output_sample_rate)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.REFCLK_FREQ, &(radio->reg_property.refclk_freq)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.REFCLK_PRESCALE, &(radio->reg_property.refclk_prescale)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_DEEMPHASIS, &(radio->reg_property.fm_deemphasis)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_BLEND_STEREO_THRESHOLD, &(radio->reg_property.fm_blend_stereo_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_BLEND_MONO_THRESHOLD, &(radio->reg_property.fm_blend_mono_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_ANTENNA_INPUT, &(radio->reg_property.fm_antena_input)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_MAX_TUNE_ERROR, &(radio->reg_property.fm_max_tune_error)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_RSQ_INT_SOURCE, &(radio->reg_property.fm_rsq_int_source)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_RSQ_SNR_HI_THRESHOLD, &(radio->reg_property.fm_rsq_snr_hi_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_RSQ_SNR_LO_THRESHOLD, &(radio->reg_property.fm_rsq_snr_lo_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_RSQ_RSSI_HI_THRESHOLD, &(radio->reg_property.fm_rsq_rssi_hi_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_RSQ_RSSI_LO_THRESHOLD, &(radio->reg_property.fm_rsq_rssi_lo_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_RQS_BLEND_THRESHOLD, &(radio->reg_property.fm_rsq_blend_threshold)); + ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SOFT_MUTE_RATE, &(radio->reg_property.fm_soft_mute_rate)); + ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SOFT_MUTE_MAX_ATTENUATION, &(radio->reg_property.fm_soft_mute_max_attenuation)); + ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SOFT_MUTE_SNR_THRESHOLD, &(radio->reg_property.fm_soft_mute_snr_threshold)); + ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SEEK_BAND_BOTTOM, &(radio->reg_property.fm_seek_band_bottom)); + ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SEEK_BAND_TOP, &(radio->reg_property.fm_seek_band_top)); + ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SEEK_FREQ_SPACING, &(radio->reg_property.fm_seek_freq_spacing)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SEEK_TUNE_SNR_THRESHOLD, &(radio->reg_property.fm_seek_tune_snr_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.FM_SEEK_TUNE_RSSI_TRESHOLD, &(radio->reg_property.fm_seek_tune_rssi_threshold)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.RDS_INT_SOURCE, &(radio->reg_property.rds_int_source)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.RDS_INT_FIFO_COUNT, &(radio->reg_property.rds_int_fifo_count)); +// ret |= si4705_get_property(radio, si4705_prop_cmd.RDS_CONFIG, &(radio->reg_property.rds_config)); + ret |= si4705_get_property(radio, si4705_prop_cmd.RX_VOLUME, &(radio->reg_property.rx_volume)); + ret |= si4705_get_property(radio, si4705_prop_cmd.RX_HARD_MUTE, &(radio->reg_property.rx_hard_mute)); + + return ret; +} + +/* V4L2 code related */ +static struct v4l2_queryctrl radio_qctrl[] = { + { + .id = V4L2_CID_AUDIO_MUTE, + .name = "Mute", + .minimum = 0, + .maximum = 1, + .default_value = 1, + .type = V4L2_CTRL_TYPE_BOOLEAN, + },{ + .id = V4L2_CID_AUDIO_VOLUME, + .name = "Volume", + .minimum = 0, + .maximum = 0x3f, + .step = 1, + .default_value = 0x20, + .type = V4L2_CTRL_TYPE_INTEGER, + } + +}; + +static int si4705_power_up(struct si4705_device *radio) +{ + u8 txdata[3]; + u8 rxdata[1] = {0}; + u8 txsize = 0, rxsize = 1; + + txdata[txsize++] = si4705_cmd.POWER_UP; + txdata[txsize++] = SI4705_PU_INT_ENABLE; + txdata[txsize++] = SI4705_PU_MODE_AN; + + return si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize); +} + +static int si4705_power_down(struct si4705_device *radio) +{ + u8 txdata[1]; + u8 rxdata[1] = {0}; + u8 txsize = 0, rxsize = 1; + + txdata[txsize++] = si4705_cmd.POWER_DOWN; + + return si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize); +} + +/* tune an frequency, freq is defined by v4l's TUNER_LOW, i.e. 1/16th kHz */ +static void si4705_tune(struct si4705_device *radio, int freq) +{ + u8 txdata[5]; + u8 rxdata[1] = {0}; + u8 txsize = 0, rxsize = 1; + + radio->reg.tunned_freq = freq / 10000; + + txdata[txsize++] = si4705_cmd.FM_TUNE_FREQ; + txdata[txsize++] = 0x00; + txdata[txsize++] = radio->reg.tunned_freq >> 8; + txdata[txsize++] = radio->reg.tunned_freq; + txdata[txsize++] = 0x00; + + if(si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize)) { + printk(KERN_INFO "%s Error setting the frequency\n", __func__); + } +} + +static void si4705_rds(struct si4705_device *radio, u8 cmd, u8 * data) +{ + u8 txdata[2]; + u8 txsize = 0; + + txdata[txsize++] = si4705_cmd.FM_RDS_STATUS; + txdata[txsize++] = cmd; + + if(si4705_do_i2c_cmd(radio, txdata, txsize, data, 13)) { + printk(KERN_INFO "%s Error reading RDS data\n", __func__); + } + +//printk(KERN_INFO "Status 0x%02x '%c'\n", rxdata[0], rxdata[0]); +//printk(KERN_INFO "Resp 1 0x%02x '%c'\n", rxdata[1], rxdata[1]); +//printk(KERN_INFO "Resp 2 0x%02x '%c'\n", rxdata[2], rxdata[2]); +//printk(KERN_INFO "Used 0x%02x '%c'\n", rxdata[3], rxdata[3]); +//printk(KERN_INFO "BLOCKA 0x%02x '%c'\n", rxdata[4], rxdata[4]); +//printk(KERN_INFO "BLOCKA 0x%02x '%c'\n", rxdata[5], rxdata[5]); +//printk(KERN_INFO "BLOCKB 0x%02x '%c'\n", rxdata[6], rxdata[6]); +//printk(KERN_INFO "BLOCKB 0x%02x '%c'\n", rxdata[7], rxdata[7]); +//printk(KERN_INFO "BLOCKC 0x%02x '%c'\n", rxdata[8], rxdata[8]); +//printk(KERN_INFO "BLOCKC 0x%02x '%c'\n", rxdata[9], rxdata[9]); +//printk(KERN_INFO "BLOCKD 0x%02x '%c'\n", rxdata[10], rxdata[10]); +//printk(KERN_INFO "BLOCKD 0x%02x '%c'\n", rxdata[11], rxdata[11]); +//printk(KERN_INFO "Errors 0x%02x '%c'\n", rxdata[12], rxdata[12]); + +} + +static void si4705_status(struct si4705_device *radio, u8 * data) +{ + u8 txdata[1]; + u8 rxdata[1] = {0}; + u8 txsize = 0, rxsize = 1; + + txdata[txsize++] = si4705_cmd.GET_INT_STATUS; + + memset(rxdata, 0, sizeof(rxdata)); + + if(si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize)) { + printk(KERN_INFO "%s Error reading RDS data\n", __func__); + } + *data = rxdata[0]; +} + +static void si4705_set_audout_mode(struct si4705_device *radio, int audmode) +{ +// struct si4705_regs *r = &radio->regs; +// int tnctrl = r->tnctrl; +// +// if (audmode == V4L2_TUNER_MODE_MONO) +// r->tnctrl |= TEA5764_TNCTRL_MST; +// else +// r->tnctrl &= ~TEA5764_TNCTRL_MST; +// if (tnctrl != r->tnctrl) +// tea5764_i2c_write(radio); +} + +static int si4705_get_audout_mode(struct si4705_device *radio) +{ +// struct tea5764_regs *r = &radio->regs; +// +// if (r->tnctrl & TEA5764_TNCTRL_MST) +// return V4L2_TUNER_MODE_MONO; +// else + return V4L2_TUNER_MODE_STEREO; +} + +/* V4L2 vidioc */ +static int vidioc_querycap(struct file *file, void *priv, + struct v4l2_capability *v) +{ + struct si4705_device *radio = video_drvdata(file); + struct video_device *dev = radio->videodev; + + strlcpy(v->driver, dev->dev.driver->name, sizeof(v->driver)); + strlcpy(v->card, dev->name, sizeof(v->card)); + snprintf(v->bus_info, sizeof(v->bus_info), + "I2C:%s", dev_name(&dev->dev)); + v->version = RADIO_VERSION; + v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO | \ + V4L2_CAP_HW_FREQ_SEEK | V4L2_CAP_RDS_CAPTURE; + return 0; +} + +static int vidioc_g_tuner(struct file *file, void *priv, + struct v4l2_tuner *v) +{ + u8 txdata[2]; + u8 rxdata[8] = {0}; + u8 txsize = 0, rxsize = 8; + struct si4705_device *radio = video_drvdata(file); + + if (v->index > 0) + return -EINVAL; + + memset(v, 0, sizeof(*v)); + strcpy(v->name, "FM"); + v->type = V4L2_TUNER_RADIO; + +// MASU complete this +// si4705_get_property(radio, si4705_prop_cmd.FM_SEEK_BAND_BOTTOM, &(radio->reg_property.fm_seek_band_bottom)); +// si4705_get_property(radio, si4705_prop_cmd.FM_SEEK_BAND_TOP, &(radio->reg_property.fm_seek_band_top)); + +// MASU FIXME Get signal quality + + txdata[txsize++] = si4705_cmd.FM_TUNE_STATUS; + txdata[txsize++] = 0x00; + + si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize); + + v->rangelow = FREQ_MIN * FREQ_MUL; + v->rangehigh = FREQ_MAX * FREQ_MUL; + v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO; +// if (r->tunchk & TEA5764_TUNCHK_STEREO) + v->rxsubchans = V4L2_TUNER_SUB_STEREO; +// else +// v->rxsubchans = V4L2_TUNER_SUB_MONO; + v->audmode = si4705_get_audout_mode(radio); + v->signal = rxdata[5] * 0xffff / 0xf; // MASU fix me +// v->afc = TEA5764_TUNCHK_IFCNT(r->tunchk); + + return 0; +} + +static int vidioc_s_tuner(struct file *file, void *priv, + struct v4l2_tuner *v) +{ + struct si4705_device *radio = video_drvdata(file); + + if (v->index > 0) + return -EINVAL; + + si4705_set_audout_mode(radio, v->audmode); + return 0; +} + +static int vidioc_s_frequency(struct file *file, void *priv, + struct v4l2_frequency *f) +{ + struct si4705_device *radio = video_drvdata(file); + + if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO) + return -EINVAL; + if (f->frequency == 0) { + /* We special case this as a power down control. */ + si4705_power_down(radio); + } + if (f->frequency < (FREQ_MIN * FREQ_MUL)) + return -EINVAL; + if (f->frequency > (FREQ_MAX * FREQ_MUL)) + return -EINVAL; + si4705_power_up(radio); + si4705_tune(radio, (f->frequency * 125) / 2); + + return 0; +} + +static int vidioc_g_frequency(struct file *file, void *priv, + struct v4l2_frequency *f) +{ + struct si4705_device *radio = video_drvdata(file); + + if (f->tuner != 0) + return -EINVAL; + + memset(f, 0, sizeof(*f)); + f->type = V4L2_TUNER_RADIO; +// if (r->tnctrl & TEA5764_TNCTRL_PUPD0) + f->frequency = (radio->reg.tunned_freq * 10000 * 2) / 125; +// else +// f->frequency = 0; + + return 0; +} + +static int vidioc_queryctrl(struct file *file, void *priv, + struct v4l2_queryctrl *qc) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(radio_qctrl); i++) { + if (qc->id && qc->id == radio_qctrl[i].id) { + memcpy(qc, &(radio_qctrl[i]), sizeof(*qc)); + return 0; + } + } + return -EINVAL; +} + +static int vidioc_g_ctrl(struct file *file, void *priv, + struct v4l2_control *ctrl) +{ + struct si4705_device *radio = video_drvdata(file); + + switch (ctrl->id) { + case V4L2_CID_AUDIO_VOLUME: + si4705_get_property(radio, si4705_prop_cmd.RX_VOLUME, &(radio->reg_property.rx_volume)); + ctrl->value = radio->reg_property.rx_volume; + return 0; + case V4L2_CID_AUDIO_MUTE: + si4705_get_property(radio, si4705_prop_cmd.RX_HARD_MUTE, &(radio->reg_property.rx_hard_mute)); + ctrl->value = (radio->reg_property.rx_hard_mute & SI4705_RHM_MUTE_ALL) ? 1 : 0; + return 0; + } + return -EINVAL; +} + +static int vidioc_s_ctrl(struct file *file, void *priv, + struct v4l2_control *ctrl) +{ + struct si4705_device *radio = video_drvdata(file); + switch (ctrl->id) { + case V4L2_CID_AUDIO_VOLUME: + si4705_set_property(radio, si4705_prop_cmd.RX_VOLUME, ctrl->value); + return 0; + case V4L2_CID_AUDIO_MUTE: + if (ctrl->value) + si4705_set_property(radio, si4705_prop_cmd.RX_HARD_MUTE, SI4705_RHM_MUTE_ALL); + else + si4705_set_property(radio, si4705_prop_cmd.RX_HARD_MUTE, SI4705_RHM_MUTE_NONE); + return 0; + } + return -EINVAL; +} + +static int vidioc_g_input(struct file *filp, void *priv, unsigned int *i) +{ + *i = 0; + return 0; +} + +static int vidioc_s_input(struct file *filp, void *priv, unsigned int i) +{ + if (i != 0) + return -EINVAL; + return 0; +} + +static int vidioc_g_audio(struct file *file, void *priv, + struct v4l2_audio *a) +{ + if (a->index > 1) + return -EINVAL; + + strcpy(a->name, "Radio"); + a->capability = V4L2_AUDCAP_STEREO; + return 0; +} + +static int vidioc_s_audio(struct file *file, void *priv, + struct v4l2_audio *a) +{ + if (a->index != 0) + return -EINVAL; + + return 0; +} + +static int si4705_open(struct file *file) +{ + struct si4705_device *radio = video_drvdata(file); + int ret = 0; + unsigned short cerr = 0x0000; + + mutex_lock(&radio->mutex); + radio->users++; + + if (radio->users == 1) { + /* start radio */ +#ifndef USE_LEGACY_ONOFF + ret = si4705_power_up(radio); + + if (ret) + goto done; +#endif +#ifdef DISSABLE_RDS + switch(max_rds_errors) { + case 0: cerr = 0x0000; break; + case 1: + case 2: cerr = 0x5500; break; + case 3: + case 4: + case 5: cerr = 0xaa00; break; + default : cerr = 0xff00; break; + } + + /* enable RDS interrupt */ + ret = si4705_set_property(radio, si4705_prop_cmd.GPO_IEN, SI4705_GI_RDSIEN); + // GPIO2 int configuret at power up + ret |= si4705_set_property(radio, si4705_prop_cmd.RDS_INT_SOURCE, 0x0001); // enable fifo filled interrupts + ret |= si4705_set_property(radio, si4705_prop_cmd.RDS_INT_FIFO_COUNT, 0x0004); + ret |= si4705_set_property(radio, si4705_prop_cmd.RDS_CONFIG, cerr |0x0001); // enable interrupt + if (ret) + goto done; +#endif + } + +done: + mutex_unlock(&radio->mutex); + return ret; +} + +static int si4705_close(struct file *file) +{ + struct si4705_device *radio = video_drvdata(file); + int ret = 0; + + if (!radio) + return -ENODEV; + mutex_lock(&radio->mutex); + radio->users--; + if (radio->users == 0) + /* stop radio */ +#ifndef USE_LEGACY_ONOFF + ret = si4705_power_down(radio); +#endif + mutex_unlock(&radio->mutex); + + return ret; +} + +/* + * si4705_fops_read - read RDS data + */ +static ssize_t si4705_fops_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + struct si4705_device *radio = video_drvdata(file); + int retval = 0; + unsigned int block_count = 0; + + /* switch on rds reception */ +// if ((radio->registers[SYSCONFIG1] & SYSCONFIG1_RDS) == 0) +// si470x_rds_on(radio); + + /* block if no new data available */ +/* while (radio->wr_index == radio->rd_index) { + if (file->f_flags & O_NONBLOCK) { + retval = -EWOULDBLOCK; + goto done; + } + if (wait_event_interruptible(radio->read_queue, + radio->wr_index != radio->rd_index) < 0) { + retval = -EINTR; + goto done; + } + } +*/ + /* calculate block count from byte count */ + count /= 3; + + /* copy RDS block out of internal buffer and to user buffer */ + mutex_lock(&radio->mutex); +/* while (block_count < count) { + if (radio->rd_index == radio->wr_index) + break; + + // always transfer rds complete blocks + if (copy_to_user(buf, &radio->buffer[radio->rd_index], 3)) + // retval = -EFAULT; + break; + + // increment and wrap read pointer + radio->rd_index += 3; + if (radio->rd_index >= radio->buf_size) + radio->rd_index = 0; + + // increment counters + block_count++; + buf += 3; + retval += 3; + } +*/ + mutex_unlock(&radio->mutex); + +//done: + return retval; +} + +/* File system interface */ +static const struct v4l2_file_operations si4705_fops = { + .owner = THIS_MODULE, + .open = si4705_open, + .release = si4705_close, + .ioctl = video_ioctl2, + .read = si4705_fops_read, +}; + +static const struct v4l2_ioctl_ops si4705_ioctl_ops = { + .vidioc_querycap = vidioc_querycap, + .vidioc_g_tuner = vidioc_g_tuner, + .vidioc_s_tuner = vidioc_s_tuner, + .vidioc_g_audio = vidioc_g_audio, + .vidioc_s_audio = vidioc_s_audio, + .vidioc_g_input = vidioc_g_input, + .vidioc_s_input = vidioc_s_input, + .vidioc_g_frequency = vidioc_g_frequency, + .vidioc_s_frequency = vidioc_s_frequency, + .vidioc_queryctrl = vidioc_queryctrl, + .vidioc_g_ctrl = vidioc_g_ctrl, + .vidioc_s_ctrl = vidioc_s_ctrl, +}; + +/* V4L2 interface */ +static struct video_device si4705_radio_template = { + .name = "SI4705 FM-Radio", + .fops = &si4705_fops, + .ioctl_ops = &si4705_ioctl_ops, + .release = video_device_release, +}; + + +/* + * si470x_i2c_interrupt_work - rds processing function + */ +#ifndef DISSABLE_RDS +static void si4705_i2c_interrupt_work(struct work_struct *work) +{ + struct si4705_device *radio = container_of(work, + struct si4705_device, radio_work); +// unsigned char regnr; +// unsigned char blocknum; +// unsigned short bler; // rds block errors + unsigned char tmpbuf[13]; +// unsigned char finbuf[13]; +// int retval = 0; + u8 status; + + // safety checks + si4705_status(radio, &status); + if ((status & SI4705_GIS_RDSINT) == 0) // not a rds interrupt + return; + + // Update RDS registers + do { + si4705_rds(radio, SI4705_FRS_INTACK, tmpbuf); + } while (tmpbuf[3] != 0x00); + + + +//printk(KERN_INFO "Status 0x%02x '%c'\n", rxdata[0], rxdata[0]); +//printk(KERN_INFO "Resp 1 0x%02x '%c'\n", rxdata[1], rxdata[1]); +//printk(KERN_INFO "Resp 2 0x%02x '%c'\n", rxdata[2], rxdata[2]); +//printk(KERN_INFO "Used 0x%02x '%c'\n", rxdata[3], rxdata[3]); +//printk(KERN_INFO "BLOCKA 0x%02x '%c'\n", rxdata[4], rxdata[4]); +//printk(KERN_INFO "BLOCKA 0x%02x '%c'\n", rxdata[5], rxdata[5]); +//printk(KERN_INFO "BLOCKB 0x%02x '%c'\n", rxdata[6], rxdata[6]); +//printk(KERN_INFO "BLOCKB 0x%02x '%c'\n", rxdata[7], rxdata[7]); +//printk(KERN_INFO "BLOCKC 0x%02x '%c'\n", rxdata[8], rxdata[8]); +//printk(KERN_INFO "BLOCKC 0x%02x '%c'\n", rxdata[9], rxdata[9]); +//printk(KERN_INFO "BLOCKD 0x%02x '%c'\n", rxdata[10], rxdata[10]); +//printk(KERN_INFO "BLOCKD 0x%02x '%c'\n", rxdata[11], rxdata[11]); +//printk(KERN_INFO "Errors 0x%02x '%c'\n", rxdata[12], rxdata[12]); +/* switch (blocknum) { + default: + bler = (radio->registers[STATUSRSSI] & + STATUSRSSI_BLERA) >> 9; + rds = radio->registers[RDSA]; + break; + case 1: + bler = (radio->registers[READCHAN] & + READCHAN_BLERB) >> 14; + rds = radio->registers[RDSB]; + break; + case 2: + bler = (radio->registers[READCHAN] & + READCHAN_BLERC) >> 12; + rds = radio->registers[RDSC]; + break; + case 3: + bler = (radio->registers[READCHAN] & + READCHAN_BLERD) >> 10; + rds = radio->registers[RDSD]; + break; + }; + + // Fill the V4L2 RDS buffer + put_unaligned_le16(rds, &tmpbuf); + tmpbuf[2] = blocknum; // offset name + tmpbuf[2] |= blocknum << 3; // received offset + if (bler > max_rds_errors) + tmpbuf[2] |= 0x80; // uncorrectable errors + else if (bler > 0) + tmpbuf[2] |= 0x40; // corrected error(s) + + // copy RDS block to internal buffer + memcpy(&radio->buffer[radio->wr_index], &tmpbuf, 3); + radio->wr_index += 3; + + // wrap write pointer + if (radio->wr_index >= radio->buf_size) + radio->wr_index = 0; + + // check for overflow + if (radio->wr_index == radio->rd_index) { + // increment and wrap read pointer + radio->rd_index += 3; + if (radio->rd_index >= radio->buf_size) + radio->rd_index = 0; + } + } + + if (radio->wr_index != radio->rd_index) + wake_up_interruptible(&radio->read_queue); +*/ +} +#else +static void si4705_i2c_interrupt_work(struct work_struct *work) { + ; +} +#endif // DISSABLE_RDS + +/* + * si470x_i2c_interrupt - interrupt handler + */ +static irqreturn_t si4705_i2c_interrupt(int irq, void *dev_id) +{ + struct si4705_device *radio = dev_id; + + if (!work_pending(&radio->radio_work)) + schedule_work(&radio->radio_work); + + return IRQ_HANDLED; +} + +/* I2C probe: check if the device exists and register with v4l if it is */ +static int __devinit si4705_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct si4705_device *radio; + u8 txdata[2]; + u8 rxdata[8]; + u8 txsize = 0, rxsize = 0; + int ret; + + memset(txdata, 0, sizeof(txdata)); + memset(rxdata, 0, sizeof(rxdata)); + + /* private data allocation and initialization */ + radio = kzalloc(sizeof(struct si4705_device), GFP_KERNEL); + if (!radio) { + ret = -ENOMEM; + goto err_initial; + } + + INIT_WORK(&radio->radio_work, si4705_i2c_interrupt_work); + radio->users = 0; + radio->i2c_client = client; + mutex_init(&radio->mutex); + + /* video device allocation and initialization */ + radio->videodev = video_device_alloc(); + if (!(radio->videodev)) { + ret = -ENOMEM; + goto err_radio; + } + memcpy(radio->videodev, &si4705_radio_template, + sizeof(si4705_radio_template)); + video_set_drvdata(radio->videodev, radio); + + /* Detect the chip in power off mode */ + txdata[txsize++] = si4705_cmd.POWER_UP; // Library ID + txdata[txsize++] = 0x0F; + + rxsize = 8; + memset(rxdata, 0, sizeof(rxdata)); + + if (si4705_do_i2c_cmd(radio, txdata, txsize, rxdata, rxsize)) { + ret = -EIO; + goto errrel; + } + + radio->reg.part_number = rxdata[1]; + radio->reg.fw_major = rxdata[2]; + radio->reg.fw_minor = rxdata[3]; + radio->reg.revision = rxdata[6]; + + + dev_info(&client->dev, "ChipID=si47%02d%c Firmware %c%c\n", + radio->reg.part_number, radio->reg.revision, \ + radio->reg.fw_major, radio->reg.fw_minor); + if ((((radio->reg.fw_major - '0') * 10) + (radio->reg.fw_minor - '0')) \ + < RADIO_FW_VERSION) { + dev_warn(&client->dev, + "This driver is known to work with " + "firmware version %hu,\n", RADIO_FW_VERSION); + dev_warn(&client->dev, + "but the device has older firmware version.\n"); + } + + /* Power on */ + if (si4705_power_up(radio)) { + ret = -EIO; + goto errrel; + } + + /* Get all properties */ +// if (si4705_get_all_properties(radio)) { +// ret = -EIO; +// goto errrel; +// } + + /* rds buffer allocation */ + radio->buf_size = rds_buf; + radio->buffer = kmalloc(radio->buf_size, GFP_KERNEL); + if (!radio->buffer) { + ret = -EIO; + goto errrel; + } + + /* rds buffer configuration */ + radio->wr_index = 0; + radio->rd_index = 0; + init_waitqueue_head(&radio->read_queue); + + ret = request_irq(client->irq, si4705_i2c_interrupt, + IRQF_TRIGGER_FALLING, DRIVER_NAME, radio); + if (ret) { + dev_err(&client->dev, "Failed to register interrupt\n"); + goto err_rds; + } + + ret = video_register_device(radio->videodev, VFL_TYPE_RADIO, radio_nr); + if (ret < 0) { + dev_warn(&client->dev, "Could not register video device!"); + goto err_all; + } + + i2c_set_clientdata(client, radio); + + return 0; +err_all: + free_irq(client->irq, radio); +err_rds: + kfree(radio->buffer); +errrel: + video_device_release(radio->videodev); +err_radio: + kfree(radio); +err_initial: + return ret; +} + +static int __devexit si4705_i2c_remove(struct i2c_client *client) +{ + struct si4705_device *radio = i2c_get_clientdata(client); + + free_irq(client->irq, radio); + cancel_work_sync(&radio->radio_work); +#ifdef USE_LEGACY_ONOFF + si4705_power_down(radio); +#endif + kfree(radio->buffer); + video_unregister_device(radio->videodev); + kfree(radio); + + return 0; +} + +/* I2C subsystem interface */ +static const struct i2c_device_id si4705_i2c_id[] = { + /* Generic Entry */ + { "radio-si4705", 0 }, + /* Terminating entry */ + { } +}; +MODULE_DEVICE_TABLE(i2c, si4705_i2c_id); + +#ifdef CONFIG_PM +/* + * si470x_i2c_suspend - suspend the device + */ +static int si4705_i2c_suspend(struct i2c_client *client, pm_message_t mesg) +{ + struct si4705_device *radio = i2c_get_clientdata(client); + + if (si4705_power_down(radio)) + return -EIO; + + return 0; +} + + +/* + * si470x_i2c_resume - resume the device + */ +static int si4705_i2c_resume(struct i2c_client *client) +{ + struct si4705_device *radio = i2c_get_clientdata(client); + + if (si4705_power_up(radio)) + return -EIO; + + return 0; +} +#else +#define si4705_i2c_suspend NULL +#define si4705_i2c_resume NULL +#endif + +static struct i2c_driver si4705_i2c_driver = { + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + }, + .probe = si4705_i2c_probe, + .remove = __devexit_p(si4705_i2c_remove), + .suspend = si4705_i2c_suspend, + .resume = si4705_i2c_resume, + .id_table = si4705_i2c_id, +}; + +/* init the driver */ +static int __init si4705_init(void) +{ + printk(KERN_INFO KBUILD_MODNAME ": " DRIVER_VERSION ": " + DRIVER_DESC "\n"); + return i2c_add_driver(&si4705_i2c_driver); +} + +/* cleanup the driver */ +static void __exit si4705_exit(void) +{ + i2c_del_driver(&si4705_i2c_driver); +} + +module_init(si4705_init); +module_exit(si4705_exit); + +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_VERSION(DRIVER_VERSION); +MODULE_LICENSE("GPL"); diff -urN linux-2.6.35.3.fsl/drivers/media/radio/radio-si4705.h linux-2.6.35.3.work/drivers/media/radio/radio-si4705.h --- linux-2.6.35.3.fsl/drivers/media/radio/radio-si4705.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.35.3.work/drivers/media/radio/radio-si4705.h 2015-11-22 16:44:14.979616903 +0100 @@ -0,0 +1,217 @@ +/* + * drivers/media/radio/radio-si4705.h + * + * Property and commands definitions for Si4705 radio receiver chip. + * + * Copyright (c) 2010 Voipac + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + */ + +#ifndef RADIO_SI4705_H +#define RADIO_SI4705_H + +#include + + +/* driver definitions */ +#define DRIVER_NAME "radio-si4705" + +#define DRIVER_VERSION "v0.01" +#define RADIO_VERSION KERNEL_VERSION(0, 0, 1) + +#define DRIVER_AUTHOR "Voipac " +#define DRIVER_DESC "A driver for the SI4705 radio chip." + +/* Tunner will remain active until the driver is uloaded */ +#define USE_LEGACY_ONOFF +#define DISSABLE_RDS + +/* Tunner will remain active only when fd is open */ +//#undef USE_LEGACY_ONOFF + +/* Frequency limits in MHz -- these are European values. For Japanese +devices, that would be 76000 and 91000. */ +#define FREQ_MIN 87500 +#define FREQ_MAX 108000 +#define FREQ_MUL 16 + +/* Firmware Versions */ +#define RADIO_FW_VERSION 20 + + +/* Status response mask */ +#define SI4705_STS_CTS 0x80 +#define SI4705_STS_ERR 0x40 + +/* Power Up mask */ +#define SI4705_PU_INT_ENABLE 0xC0 +#define SI4705_PU_MODE_AN 0x05 +#define SI4705_PU_MODE_DI 0xB0 +#define SI4705_PU_MODE_ANDI (SI4705_PU_MODE_AN | SI4705_PU_MODE_DI) + +/* Get int status mask */ +#define SI4705_GIS_RDSINT 0x04 + +/* Fm rds starus mask */ +#define SI4705_FRS_MTFIFO 0x02 +#define SI4705_FRS_INTACK 0x01 + +struct si4705_reg { + u8 part_number; // hex - last two digits + u8 fw_major; // ASCII + u8 fw_minor; // ASCII + u8 revision; // ASCII + u16 tunned_freq; // hex 101.20MHz ~ 0x2788 +} __attribute__ ((packed)); + +typedef struct { + u8 POWER_UP; + u8 GET_REV; + u8 POWER_DOWN; + u8 SET_PROPERTY; + u8 GET_PROPERTY; + u8 GET_INT_STATUS; + u8 PATCH_ARGS; + u8 PATCH_DATA; + u8 FM_TUNE_FREQ; + u8 FM_SEEK_START; + u8 FM_TUNE_STATUS; + u8 FM_RSQ_STATUS; + u8 FM_RDS_STATUS; + u8 FM_AGC_STATUS; + u8 FM_AGC_OVERRIDE; + u8 GPIO_CTL; + u8 GPIO_SET; +} SI4705_CMD; + +SI4705_CMD si4705_cmd = { + .POWER_UP = 0x01, + .GET_REV = 0x10, + .POWER_DOWN = 0x11, + .SET_PROPERTY = 0x12, + .GET_PROPERTY = 0x13, + .GET_INT_STATUS = 0x14, + .PATCH_ARGS = 0x15, + .PATCH_DATA = 0x16, + .FM_TUNE_FREQ = 0x20, + .FM_SEEK_START = 0x21, + .FM_TUNE_STATUS = 0x22, + .FM_RSQ_STATUS = 0x23, + .FM_RDS_STATUS = 0x24, + .FM_AGC_STATUS = 0x27, + .FM_AGC_OVERRIDE = 0x28, + .GPIO_CTL = 0x80, + .GPIO_SET = 0x81 +}; + +/* gpo_ien */ +#define SI4705_GI_RDSREP 0x0400 +#define SI4705_GI_RDSIEN 0x0004 + +/* rx_hard_mute */ +#define SI4705_RHM_MUTE_R 0x0001 +#define SI4705_RHM_MUTE_L 0x0002 +#define SI4705_RHM_MUTE_ALL (SI4705_RHM_MUTE_R | SI4705_RHM_MUTE_L) +#define SI4705_RHM_MUTE_NONE 0x0000 + +struct si4705_property { + u16 gpo_ien; /* Enables interrupt sources */ + u16 digital_output_format; /* Configure digital audio outputs */ + u16 digital_output_sample_rate; + u16 refclk_freq; + u16 refclk_prescale; + u16 fm_deemphasis; + u16 fm_blend_stereo_threshold; + u16 fm_blend_mono_threshold; + u16 fm_antena_input; + u16 fm_max_tune_error; + u16 fm_rsq_int_source; + u16 fm_rsq_snr_hi_threshold; + u16 fm_rsq_snr_lo_threshold; + u16 fm_rsq_rssi_hi_threshold; + u16 fm_rsq_rssi_lo_threshold; + u16 fm_rsq_blend_threshold; + u16 fm_soft_mute_rate; + u16 fm_soft_mute_max_attenuation; + u16 fm_soft_mute_snr_threshold; + u16 fm_seek_band_bottom; + u16 fm_seek_band_top; + u16 fm_seek_freq_spacing; + u16 fm_seek_tune_snr_threshold; + u16 fm_seek_tune_rssi_threshold; + u16 rds_int_source; + u16 rds_int_fifo_count; + u16 rds_config; + u16 rx_volume; + u16 rx_hard_mute; +} __attribute__ ((packed)); + +typedef struct { + u16 GPO_IEN; + u16 DIGITAL_OUTPUT_FORMAT; + u16 DIGITAL_OUTPUT_SAMPLE_RATE; + u16 REFCLK_FREQ; + u16 REFCLK_PRESCALE; + u16 FM_DEEMPHASIS; + u16 FM_BLEND_STEREO_THRESHOLD; + u16 FM_BLEND_MONO_THRESHOLD; + u16 FM_ANTENNA_INPUT; + u16 FM_MAX_TUNE_ERROR; + u16 FM_RSQ_INT_SOURCE; + u16 FM_RSQ_SNR_HI_THRESHOLD; + u16 FM_RSQ_SNR_LO_THRESHOLD; + u16 FM_RSQ_RSSI_HI_THRESHOLD; + u16 FM_RSQ_RSSI_LO_THRESHOLD; + u16 FM_RQS_BLEND_THRESHOLD; + u16 FM_SOFT_MUTE_RATE; + u16 FM_SOFT_MUTE_MAX_ATTENUATION; + u16 FM_SOFT_MUTE_SNR_THRESHOLD; + u16 FM_SEEK_BAND_BOTTOM; + u16 FM_SEEK_BAND_TOP; + u16 FM_SEEK_FREQ_SPACING; + u16 FM_SEEK_TUNE_SNR_THRESHOLD; + u16 FM_SEEK_TUNE_RSSI_TRESHOLD; + u16 RDS_INT_SOURCE; + u16 RDS_INT_FIFO_COUNT; + u16 RDS_CONFIG; + u16 RX_VOLUME; + u16 RX_HARD_MUTE; +} SI4705_PROP_CMD; + +SI4705_PROP_CMD si4705_prop_cmd = { + .GPO_IEN = 0x0001, + .DIGITAL_OUTPUT_FORMAT = 0x0102, + .DIGITAL_OUTPUT_SAMPLE_RATE = 0x0104, + .REFCLK_FREQ = 0x0201, + .REFCLK_PRESCALE = 0x0202, + .FM_DEEMPHASIS = 0x1100, + .FM_BLEND_STEREO_THRESHOLD = 0x1105, + .FM_BLEND_MONO_THRESHOLD = 0x1106, + .FM_ANTENNA_INPUT = 0x1107, + .FM_MAX_TUNE_ERROR = 0x1108, + .FM_RSQ_INT_SOURCE = 0x1200, + .FM_RSQ_SNR_HI_THRESHOLD = 0x1201, + .FM_RSQ_SNR_LO_THRESHOLD = 0x1202, + .FM_RSQ_RSSI_HI_THRESHOLD = 0x1203, + .FM_RSQ_RSSI_LO_THRESHOLD = 0x1204, + .FM_RQS_BLEND_THRESHOLD = 0x1207, + .FM_SOFT_MUTE_RATE = 0x1300, + .FM_SOFT_MUTE_MAX_ATTENUATION = 0x1302, + .FM_SOFT_MUTE_SNR_THRESHOLD = 0x1303, + .FM_SEEK_BAND_BOTTOM = 0x1400, + .FM_SEEK_BAND_TOP = 0x1401, + .FM_SEEK_FREQ_SPACING = 0x1402, + .FM_SEEK_TUNE_SNR_THRESHOLD = 0x1403, + .FM_SEEK_TUNE_RSSI_TRESHOLD = 0x1404, + .RDS_INT_SOURCE = 0x1500, + .RDS_INT_FIFO_COUNT = 0x1501, + .RDS_CONFIG = 0x1502, + .RX_VOLUME = 0x4000, + .RX_HARD_MUTE = 0x4001 +}; + +#endif /* ifndef RADIO_SI4705_H */ diff -urN linux-2.6.35.3.fsl/drivers/mtd/devices/m25p80.c linux-2.6.35.3.work/drivers/mtd/devices/m25p80.c --- linux-2.6.35.3.fsl/drivers/mtd/devices/m25p80.c 2010-08-20 20:55:55.000000000 +0200 +++ linux-2.6.35.3.work/drivers/mtd/devices/m25p80.c 2015-11-22 16:56:02.419602929 +0100 @@ -668,6 +668,7 @@ { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) }, { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) }, { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K) }, + { "sst26vf032b", INFO(0xbf2642, 0, 64 * 1024, 64, SECT_4K) }, /* ST Microelectronics -- newer production may have feature updates */ { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) }, diff -urN linux-2.6.35.3.fsl/drivers/mtd/devices/mxc_m25p80.c linux-2.6.35.3.work/drivers/mtd/devices/mxc_m25p80.c --- linux-2.6.35.3.fsl/drivers/mtd/devices/mxc_m25p80.c 2015-11-23 20:06:25.623833712 +0100 +++ linux-2.6.35.3.work/drivers/mtd/devices/mxc_m25p80.c 2015-11-22 16:55:34.187603487 +0100 @@ -808,6 +808,7 @@ {"sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K)}, {"sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K)}, {"sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K)}, + {"sst26vf032b", INFO(0xbf2642, 0, 64 * 1024, 64, SECT_4K)}, /* ST Microelectronics -- newer production may have feature updates */ {"m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0)}, diff -urN linux-2.6.35.3.fsl/drivers/mtd/nand/imx_nfc.c linux-2.6.35.3.work/drivers/mtd/nand/imx_nfc.c --- linux-2.6.35.3.fsl/drivers/mtd/nand/imx_nfc.c 2015-11-23 20:06:25.631833712 +0100 +++ linux-2.6.35.3.work/drivers/mtd/nand/imx_nfc.c 2015-11-22 16:44:14.983616902 +0100 @@ -24,6 +24,7 @@ #include #include #include +#include #define DRIVER_VERSION "1.0" @@ -6124,7 +6125,7 @@ * @buf: A pointer to the destination buffer. */ static int mil_ecc_read_page(struct mtd_info *mtd, - struct nand_chip *nand, uint8_t *buf) + struct nand_chip *nand, uint8_t *buf, int page) { int ecc_status; struct imx_nfc_data *this = nand->priv; @@ -6163,7 +6164,7 @@ * @buf: A pointer to the destination buffer. */ static int mil_ecc_read_page_raw(struct mtd_info *mtd, - struct nand_chip *nand, uint8_t *buf) + struct nand_chip *nand, uint8_t *buf, int page) { struct imx_nfc_data *this = nand->priv; @@ -6175,9 +6176,7 @@ this->page_address, buf, nand->oob_poi); add_event("Exiting mil_ecc_read_page_raw", -1); - return 0; - } /** @@ -6664,24 +6663,24 @@ /* Module attributes that appear in sysfs. */ -module_param_call(enable, set_module_enable, get_module_enable, 0, 0444); +module_param_call(enable, set_module_enable, get_module_enable, NULL, 0444); MODULE_PARM_DESC(enable, "enables/disables probing"); #ifdef EVENT_REPORTING module_param_call(report_events, - set_module_report_events, get_module_report_events, 0, 0644); + set_module_report_events, get_module_report_events, NULL, 0644); MODULE_PARM_DESC(report_events, "enables/disables event reporting"); -module_param_call(dump_events, set_module_dump_events, 0, 0, 0644); +module_param_call(dump_events, set_module_dump_events, NULL, NULL, 0644); MODULE_PARM_DESC(dump_events, "forces current event dump"); #endif module_param_call(interleave_override, set_module_interleave_override, - get_module_interleave_override, 0, 0444); + get_module_interleave_override, NULL, 0444); MODULE_PARM_DESC(interleave_override, "overrides interleaving choice"); module_param_call(force_bytewise_copy, set_module_force_bytewise_copy, - get_module_force_bytewise_copy, 0, 0644); + get_module_force_bytewise_copy, NULL, 0644); MODULE_PARM_DESC(force_bytewise_copy, "forces bytewise copy from/to NFC"); /** @@ -6779,8 +6778,8 @@ break; default: o += sprintf(buf+o, " Offset: %u (%u MiB)\n", - partition->offset, - partition->offset / (1024 * 1024)); + (unsigned int) partition->offset, + (unsigned int) (partition->offset / (1024 * 1024))); break; } @@ -6790,8 +6789,8 @@ "MTDPART_SIZ_FULL\n"); } else { o += sprintf(buf+o, " Size : %u (%u MiB)\n", - partition->size, - partition->size / (1024 * 1024)); + (unsigned int) partition->size, + (unsigned int) (partition->size / (1024 * 1024))); } } @@ -6974,7 +6973,7 @@ , nand->options, nand->numchips, - nand->chipsize, + (long unsigned int) nand->chipsize, nand->subpagesize, nand->page_shift, nand->pagemask, @@ -7057,7 +7056,7 @@ "Name : %s\n" "Type : %u\n" "Flags : 0x%08x\n" - "Size in Bytes : %u\n" + "Size in Bytes : %lu\n" "Erase Region Count : %d\n" "Erase Size in Bytes: %u\n" "Write Size in Bytes: %u\n" @@ -7070,7 +7069,7 @@ mtd->name, mtd->type, mtd->flags, - mtd->size, + (long unsigned int) mtd->size, mtd->numeraseregions, mtd->erasesize, mtd->writesize, @@ -7627,7 +7626,7 @@ this->interrupt = r->start; error = request_irq(this->interrupt, - nfc_util_isr, 0, this->dev->bus_id, this); + nfc_util_isr, 0, "imx_nfc", this); if (error) { dev_err(dev, "Can't own interrupt %d\n", this->interrupt); diff -urN linux-2.6.35.3.fsl/drivers/mtd/nand/mxc_nd2.c linux-2.6.35.3.work/drivers/mtd/nand/mxc_nd2.c --- linux-2.6.35.3.fsl/drivers/mtd/nand/mxc_nd2.c 2015-11-23 20:06:25.635833712 +0100 +++ linux-2.6.35.3.work/drivers/mtd/nand/mxc_nd2.c 2015-11-22 16:44:15.323616896 +0100 @@ -1566,6 +1566,7 @@ nfc_clk = clk_get(&pdev->dev, "nfc_clk"); clk_enable(nfc_clk); mxc_nand_data->clk_active = 1; + mxc_nand_data->disable_bi_swap = 1; if (hardware_ecc) { this->ecc.read_page = mxc_nand_read_page; @@ -1602,6 +1603,7 @@ err = -ENXIO; goto out_1; } + mtd->name=flash->name; /* Register the partitions */ #ifdef CONFIG_MTD_PARTITIONS diff -urN linux-2.6.35.3.fsl/drivers/mtd/nand/nand_device_info.c linux-2.6.35.3.work/drivers/mtd/nand/nand_device_info.c --- linux-2.6.35.3.fsl/drivers/mtd/nand/nand_device_info.c 2015-11-23 20:06:25.635833712 +0100 +++ linux-2.6.35.3.work/drivers/mtd/nand/nand_device_info.c 2015-11-22 16:44:15.323616896 +0100 @@ -136,6 +136,25 @@ }, { .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xa1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F1G08", + }, + { + .end_of_table = false, .manufacturer_code = 0x20, .device_code = 0xda, .cell_technology = NAND_DEVICE_CELL_TECH_SLC, @@ -403,6 +422,26 @@ { .end_of_table = false, .manufacturer_code = 0x2c, + .device_code = 0x38, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, +// .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F8G08ABABAWP", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, .device_code = 0xd3, .cell_technology = NAND_DEVICE_CELL_TECH_SLC, .chip_size_in_bytes = 1LL*SZ_1G, @@ -916,6 +955,25 @@ { .end_of_table = false, .manufacturer_code = 0x2c, + .device_code = 0xa3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F8G08ADBDA", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, .device_code = 0xd3, .cell_technology = NAND_DEVICE_CELL_TECH_SLC, .chip_size_in_bytes = 1LL*SZ_1G, @@ -935,6 +993,25 @@ { .end_of_table = false, .manufacturer_code = 0x2c, + .device_code = 0xac, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F4G08ABB", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, .device_code = 0xdc, .cell_technology = NAND_DEVICE_CELL_TECH_SLC, .chip_size_in_bytes = 512LL*SZ_1M, @@ -953,6 +1030,25 @@ }, { .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 7, + .data_hold_in_ns = 5, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F2G08ABA", + }, + { + .end_of_table = false, .manufacturer_code = 0xec, .device_code = 0xdc, .cell_technology = NAND_DEVICE_CELL_TECH_SLC, diff -urN linux-2.6.35.3.fsl/drivers/mtd/nand/nand_ids.c linux-2.6.35.3.work/drivers/mtd/nand/nand_ids.c --- linux-2.6.35.3.fsl/drivers/mtd/nand/nand_ids.c 2015-11-23 20:06:25.635833712 +0100 +++ linux-2.6.35.3.work/drivers/mtd/nand/nand_ids.c 2015-11-22 16:44:15.323616896 +0100 @@ -100,6 +100,7 @@ /* 8 Gigabit */ {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS}, + {"NAND 1GiB 3,3V 8-bit", 0x38, 0, 1024, 0, LP_OPTIONS}, {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS}, {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16}, {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16}, diff -urN linux-2.6.35.3.fsl/drivers/spi/Kconfig linux-2.6.35.3.work/drivers/spi/Kconfig --- linux-2.6.35.3.fsl/drivers/spi/Kconfig 2015-11-23 20:06:25.887833707 +0100 +++ linux-2.6.35.3.work/drivers/spi/Kconfig 2015-11-22 16:44:15.323616896 +0100 @@ -143,10 +143,26 @@ GPIO operations, you should be able to leverage that for better speed with a custom version of this driver; see the source code. +config SPI_IMX_VER_IMX1 + def_bool y if ARCH_MX1 + +config SPI_IMX_VER_0_0 + def_bool y if ARCH_MX21 || ARCH_MX27 + +config SPI_IMX_VER_0_4 + def_bool y if ARCH_MX31 + +config SPI_IMX_VER_0_7 + def_bool y if ARCH_MX25 || ARCH_MX35 || ARCH_MX51 || ARCH_MX53 + +config SPI_IMX_VER_2_3 + def_bool y if ARCH_MX51 || ARCH_MX53 + config SPI_IMX tristate "Freescale i.MX SPI controllers" depends on ARCH_MXC select SPI_BITBANG + default m if IMX_HAVE_PLATFORM_SPI_IMX help This enables using the Freescale i.MX SPI controllers in master mode. diff -urN linux-2.6.35.3.fsl/drivers/spi/spi_imx.c linux-2.6.35.3.work/drivers/spi/spi_imx.c --- linux-2.6.35.3.fsl/drivers/spi/spi_imx.c 2010-08-20 20:55:55.000000000 +0200 +++ linux-2.6.35.3.work/drivers/spi/spi_imx.c 2015-11-22 16:44:15.323616896 +0100 @@ -56,7 +56,27 @@ unsigned int speed_hz; unsigned int bpw; unsigned int mode; - int cs; + u8 cs; +}; + +enum spi_imx_devtype { + SPI_IMX_VER_IMX1, + SPI_IMX_VER_0_0, + SPI_IMX_VER_0_4, + SPI_IMX_VER_0_5, + SPI_IMX_VER_0_7, + SPI_IMX_VER_2_3, +}; + +struct spi_imx_data; + +struct spi_imx_devtype_data { + void (*intctrl)(struct spi_imx_data *, int); + int (*config)(struct spi_imx_data *, struct spi_imx_config *); + void (*trigger)(struct spi_imx_data *); + int (*rx_available)(struct spi_imx_data *); + void (*reset)(struct spi_imx_data *); + unsigned int fifosize; }; struct spi_imx_data { @@ -76,11 +96,7 @@ const void *tx_buf; unsigned int txfifo; /* number of words pushed in tx FIFO */ - /* SoC specific functions */ - void (*intctrl)(struct spi_imx_data *, int); - int (*config)(struct spi_imx_data *, struct spi_imx_config *); - void (*trigger)(struct spi_imx_data *); - int (*rx_available)(struct spi_imx_data *); + struct spi_imx_devtype_data devtype_data; }; #define MXC_SPI_BUF_RX(type) \ @@ -140,7 +156,7 @@ return max; } -/* MX1, MX31, MX35 */ +/* MX1, MX31, MX35, MX51 CSPI */ static unsigned int spi_imx_clkdiv_2(unsigned int fin, unsigned int fspi) { @@ -155,6 +171,134 @@ return 7; } +#define SPI_IMX2_3_CTRL 0x08 +#define SPI_IMX2_3_CTRL_ENABLE (1 << 0) +#define SPI_IMX2_3_CTRL_XCH (1 << 2) +#define SPI_IMX2_3_CTRL_MODE_MASK (0xf << 4) +#define SPI_IMX2_3_CTRL_POSTDIV_OFFSET 8 +#define SPI_IMX2_3_CTRL_PREDIV_OFFSET 12 +#define SPI_IMX2_3_CTRL_CS(cs) ((cs) << 18) +#define SPI_IMX2_3_CTRL_BL_OFFSET 20 + +#define SPI_IMX2_3_CONFIG 0x0c +#define SPI_IMX2_3_CONFIG_SCLKPHA(cs) (1 << ((cs) + 0)) +#define SPI_IMX2_3_CONFIG_SCLKPOL(cs) (1 << ((cs) + 4)) +#define SPI_IMX2_3_CONFIG_SBBCTRL(cs) (1 << ((cs) + 8)) +#define SPI_IMX2_3_CONFIG_SSBPOL(cs) (1 << ((cs) + 12)) + +#define SPI_IMX2_3_INT 0x10 +#define SPI_IMX2_3_INT_TEEN (1 << 0) +#define SPI_IMX2_3_INT_RREN (1 << 3) + +#define SPI_IMX2_3_STAT 0x18 +#define SPI_IMX2_3_STAT_RR (1 << 3) + +/* MX51 eCSPI */ +static unsigned int spi_imx2_3_clkdiv(unsigned int fin, unsigned int fspi) +{ + /* + * there are two 4-bit dividers, the pre-divider divides by + * $pre, the post-divider by 2^$post + */ + unsigned int pre, post; + + if (unlikely(fspi > fin)) + return 0; + + post = fls(fin) - fls(fspi); + if (fin > fspi << post) + post++; + + /* now we have: (fin <= fspi << post) with post being minimal */ + + post = max(4U, post) - 4; + if (unlikely(post > 0xf)) { + pr_err("%s: cannot set clock freq: %u (base freq: %u)\n", + __func__, fspi, fin); + return 0xff; + } + + pre = DIV_ROUND_UP(fin, fspi << post) - 1; + + pr_debug("%s: fin: %u, fspi: %u, post: %u, pre: %u\n", + __func__, fin, fspi, post, pre); + return (pre << SPI_IMX2_3_CTRL_PREDIV_OFFSET) | + (post << SPI_IMX2_3_CTRL_POSTDIV_OFFSET); +} + +static void __maybe_unused spi_imx2_3_intctrl(struct spi_imx_data *spi_imx, int enable) +{ + unsigned val = 0; + + if (enable & MXC_INT_TE) + val |= SPI_IMX2_3_INT_TEEN; + + if (enable & MXC_INT_RR) + val |= SPI_IMX2_3_INT_RREN; + + writel(val, spi_imx->base + SPI_IMX2_3_INT); +} + +static void __maybe_unused spi_imx2_3_trigger(struct spi_imx_data *spi_imx) +{ + u32 reg; + + reg = readl(spi_imx->base + SPI_IMX2_3_CTRL); + reg |= SPI_IMX2_3_CTRL_XCH; + writel(reg, spi_imx->base + SPI_IMX2_3_CTRL); +} + +static int __maybe_unused spi_imx2_3_config(struct spi_imx_data *spi_imx, + struct spi_imx_config *config) +{ + u32 ctrl = SPI_IMX2_3_CTRL_ENABLE, cfg = 0; + + /* + * The hardware seems to have a race condition when changing modes. The + * current assumption is that the selection of the channel arrives + * earlier in the hardware than the mode bits when they are written at + * the same time. + * So set master mode for all channels as we do not support slave mode. + */ + ctrl |= SPI_IMX2_3_CTRL_MODE_MASK; + + /* set clock speed */ + ctrl |= spi_imx2_3_clkdiv(spi_imx->spi_clk, config->speed_hz); + + /* set chip select to use */ + ctrl |= SPI_IMX2_3_CTRL_CS(config->cs); + + ctrl |= (config->bpw - 1) << SPI_IMX2_3_CTRL_BL_OFFSET; + + cfg |= SPI_IMX2_3_CONFIG_SBBCTRL(config->cs); + + if (config->mode & SPI_CPHA) + cfg |= SPI_IMX2_3_CONFIG_SCLKPHA(config->cs); + + if (config->mode & SPI_CPOL) + cfg |= SPI_IMX2_3_CONFIG_SCLKPOL(config->cs); + + if (config->mode & SPI_CS_HIGH) + cfg |= SPI_IMX2_3_CONFIG_SSBPOL(config->cs); + + writel(ctrl, spi_imx->base + SPI_IMX2_3_CTRL); + writel(cfg, spi_imx->base + SPI_IMX2_3_CONFIG); + + return 0; +} + +static int __maybe_unused spi_imx2_3_rx_available(struct spi_imx_data *spi_imx) +{ + return readl(spi_imx->base + SPI_IMX2_3_STAT) & SPI_IMX2_3_STAT_RR; +} + +static void __maybe_unused spi_imx2_3_reset(struct spi_imx_data *spi_imx) +{ + /* drain receive buffer */ + while (spi_imx2_3_rx_available(spi_imx)) + readl(spi_imx->base + MXC_CSPIRXDATA); +} + #define MX31_INTREG_TEEN (1 << 0) #define MX31_INTREG_RREN (1 << 3) @@ -178,7 +322,7 @@ * the i.MX35 has a slightly different register layout for bits * we do not use here. */ -static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable) +static void __maybe_unused mx31_intctrl(struct spi_imx_data *spi_imx, int enable) { unsigned int val = 0; @@ -190,7 +334,7 @@ writel(val, spi_imx->base + MXC_CSPIINT); } -static void mx31_trigger(struct spi_imx_data *spi_imx) +static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx) { unsigned int reg; @@ -199,20 +343,16 @@ writel(reg, spi_imx->base + MXC_CSPICTRL); } -static int mx31_config(struct spi_imx_data *spi_imx, +static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; + int cs = spi_imx->chipselect[config->cs]; reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << MX31_CSPICTRL_DR_SHIFT; - if (cpu_is_mx31()) - reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT; - else if (cpu_is_mx25() || cpu_is_mx35()) { - reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT; - reg |= MX31_CSPICTRL_SSCTL; - } + reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT; if (config->mode & SPI_CPHA) reg |= MX31_CSPICTRL_PHA; @@ -220,23 +360,52 @@ reg |= MX31_CSPICTRL_POL; if (config->mode & SPI_CS_HIGH) reg |= MX31_CSPICTRL_SSPOL; - if (config->cs < 0) { - if (cpu_is_mx31()) - reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT; - else if (cpu_is_mx25() || cpu_is_mx35()) - reg |= (config->cs + 32) << MX35_CSPICTRL_CS_SHIFT; - } + if (cs < 0) + reg |= (cs + 32) << MX31_CSPICTRL_CS_SHIFT; writel(reg, spi_imx->base + MXC_CSPICTRL); return 0; } -static int mx31_rx_available(struct spi_imx_data *spi_imx) +static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, + struct spi_imx_config *config) +{ + unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; + int cs = spi_imx->chipselect[config->cs]; + + reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << + MX31_CSPICTRL_DR_SHIFT; + + reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT; + reg |= MX31_CSPICTRL_SSCTL; + + if (config->mode & SPI_CPHA) + reg |= MX31_CSPICTRL_PHA; + if (config->mode & SPI_CPOL) + reg |= MX31_CSPICTRL_POL; + if (config->mode & SPI_CS_HIGH) + reg |= MX31_CSPICTRL_SSPOL; + if (cs < 0) + reg |= (cs + 32) << MX35_CSPICTRL_CS_SHIFT; + + writel(reg, spi_imx->base + MXC_CSPICTRL); + + return 0; +} + +static int __maybe_unused mx31_rx_available(struct spi_imx_data *spi_imx) { return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; } +static void __maybe_unused spi_imx0_4_reset(struct spi_imx_data *spi_imx) +{ + /* drain receive buffer */ + while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR) + readl(spi_imx->base + MXC_CSPIRXDATA); +} + #define MX27_INTREG_RR (1 << 4) #define MX27_INTREG_TEEN (1 << 9) #define MX27_INTREG_RREN (1 << 13) @@ -250,7 +419,7 @@ #define MX27_CSPICTRL_DR_SHIFT 14 #define MX27_CSPICTRL_CS_SHIFT 19 -static void mx27_intctrl(struct spi_imx_data *spi_imx, int enable) +static void __maybe_unused mx27_intctrl(struct spi_imx_data *spi_imx, int enable) { unsigned int val = 0; @@ -262,7 +431,7 @@ writel(val, spi_imx->base + MXC_CSPIINT); } -static void mx27_trigger(struct spi_imx_data *spi_imx) +static void __maybe_unused mx27_trigger(struct spi_imx_data *spi_imx) { unsigned int reg; @@ -271,10 +440,11 @@ writel(reg, spi_imx->base + MXC_CSPICTRL); } -static int mx27_config(struct spi_imx_data *spi_imx, +static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER; + int cs = spi_imx->chipselect[config->cs]; reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) << MX27_CSPICTRL_DR_SHIFT; @@ -286,19 +456,24 @@ reg |= MX27_CSPICTRL_POL; if (config->mode & SPI_CS_HIGH) reg |= MX27_CSPICTRL_SSPOL; - if (config->cs < 0) - reg |= (config->cs + 32) << MX27_CSPICTRL_CS_SHIFT; + if (cs < 0) + reg |= (cs + 32) << MX27_CSPICTRL_CS_SHIFT; writel(reg, spi_imx->base + MXC_CSPICTRL); return 0; } -static int mx27_rx_available(struct spi_imx_data *spi_imx) +static int __maybe_unused mx27_rx_available(struct spi_imx_data *spi_imx) { return readl(spi_imx->base + MXC_CSPIINT) & MX27_INTREG_RR; } +static void __maybe_unused spi_imx0_0_reset(struct spi_imx_data *spi_imx) +{ + writel(1, spi_imx->base + MXC_RESET); +} + #define MX1_INTREG_RR (1 << 3) #define MX1_INTREG_TEEN (1 << 8) #define MX1_INTREG_RREN (1 << 11) @@ -310,7 +485,7 @@ #define MX1_CSPICTRL_MASTER (1 << 10) #define MX1_CSPICTRL_DR_SHIFT 13 -static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable) +static void __maybe_unused mx1_intctrl(struct spi_imx_data *spi_imx, int enable) { unsigned int val = 0; @@ -322,7 +497,7 @@ writel(val, spi_imx->base + MXC_CSPIINT); } -static void mx1_trigger(struct spi_imx_data *spi_imx) +static void __maybe_unused mx1_trigger(struct spi_imx_data *spi_imx) { unsigned int reg; @@ -331,7 +506,7 @@ writel(reg, spi_imx->base + MXC_CSPICTRL); } -static int mx1_config(struct spi_imx_data *spi_imx, +static int __maybe_unused mx1_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER; @@ -350,11 +525,73 @@ return 0; } -static int mx1_rx_available(struct spi_imx_data *spi_imx) +static int __maybe_unused mx1_rx_available(struct spi_imx_data *spi_imx) { return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; } +static void __maybe_unused mx1_reset(struct spi_imx_data *spi_imx) +{ + writel(1, spi_imx->base + MXC_RESET); +} + +/* + * These version numbers are taken from the Freescale driver. Unfortunately it + * doesn't support i.MX1, so this entry doesn't match the scheme. :-( + */ +static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { +#ifdef CONFIG_SPI_IMX_VER_IMX1 + [SPI_IMX_VER_IMX1] = { + .intctrl = mx1_intctrl, + .config = mx1_config, + .trigger = mx1_trigger, + .rx_available = mx1_rx_available, + .reset = mx1_reset, + .fifosize = 8, + }, +#endif +#ifdef CONFIG_SPI_IMX_VER_0_0 + [SPI_IMX_VER_0_0] = { + .intctrl = mx27_intctrl, + .config = mx27_config, + .trigger = mx27_trigger, + .rx_available = mx27_rx_available, + .reset = spi_imx0_0_reset, + .fifosize = 8, + }, +#endif +#ifdef CONFIG_SPI_IMX_VER_0_4 + [SPI_IMX_VER_0_4] = { + .intctrl = mx31_intctrl, + .config = spi_imx0_4_config, + .trigger = mx31_trigger, + .rx_available = mx31_rx_available, + .reset = spi_imx0_4_reset, + .fifosize = 8, + }, +#endif +#ifdef CONFIG_SPI_IMX_VER_0_7 + [SPI_IMX_VER_0_7] = { + .intctrl = mx31_intctrl, + .config = spi_imx0_7_config, + .trigger = mx31_trigger, + .rx_available = mx31_rx_available, + .reset = spi_imx0_4_reset, + .fifosize = 8, + }, +#endif +#ifdef CONFIG_SPI_IMX_VER_2_3 + [SPI_IMX_VER_2_3] = { + .intctrl = spi_imx2_3_intctrl, + .config = spi_imx2_3_config, + .trigger = spi_imx2_3_trigger, + .rx_available = spi_imx2_3_rx_available, + .reset = spi_imx2_3_reset, + .fifosize = 64, + }, +#endif +}; + static void spi_imx_chipselect(struct spi_device *spi, int is_active) { struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); @@ -370,21 +607,21 @@ static void spi_imx_push(struct spi_imx_data *spi_imx) { - while (spi_imx->txfifo < 8) { + while (spi_imx->txfifo < spi_imx->devtype_data.fifosize) { if (!spi_imx->count) break; spi_imx->tx(spi_imx); spi_imx->txfifo++; } - spi_imx->trigger(spi_imx); + spi_imx->devtype_data.trigger(spi_imx); } static irqreturn_t spi_imx_isr(int irq, void *dev_id) { struct spi_imx_data *spi_imx = dev_id; - while (spi_imx->rx_available(spi_imx)) { + while (spi_imx->devtype_data.rx_available(spi_imx)) { spi_imx->rx(spi_imx); spi_imx->txfifo--; } @@ -398,11 +635,12 @@ /* No data left to push, but still waiting for rx data, * enable receive data available interrupt. */ - spi_imx->intctrl(spi_imx, MXC_INT_RR); + spi_imx->devtype_data.intctrl( + spi_imx, MXC_INT_RR); return IRQ_HANDLED; } - spi_imx->intctrl(spi_imx, 0); + spi_imx->devtype_data.intctrl(spi_imx, 0); complete(&spi_imx->xfer_done); return IRQ_HANDLED; @@ -417,7 +655,7 @@ config.bpw = t ? t->bits_per_word : spi->bits_per_word; config.speed_hz = t ? t->speed_hz : spi->max_speed_hz; config.mode = spi->mode; - config.cs = spi_imx->chipselect[spi->chip_select]; + config.cs = spi->chip_select; if (!config.speed_hz) config.speed_hz = spi->max_speed_hz; @@ -439,7 +677,7 @@ } else BUG(); - spi_imx->config(spi_imx, &config); + spi_imx->devtype_data.config(spi_imx, &config); return 0; } @@ -458,7 +696,7 @@ spi_imx_push(spi_imx); - spi_imx->intctrl(spi_imx, MXC_INT_TE); + spi_imx->devtype_data.intctrl(spi_imx, MXC_INT_TE); wait_for_completion(&spi_imx->xfer_done); @@ -485,6 +723,36 @@ { } +static struct platform_device_id spi_imx_devtype[] = { + { + .name = "imx1-cspi", + .driver_data = SPI_IMX_VER_IMX1, + }, { + .name = "imx21-cspi", + .driver_data = SPI_IMX_VER_0_0, + }, { + .name = "imx25-cspi", + .driver_data = SPI_IMX_VER_0_7, + }, { + .name = "imx27-cspi", + .driver_data = SPI_IMX_VER_0_0, + }, { + .name = "imx31-cspi", + .driver_data = SPI_IMX_VER_0_4, + }, { + .name = "imx35-cspi", + .driver_data = SPI_IMX_VER_0_7, + }, { + .name = "imx5x-cspi", + .driver_data = SPI_IMX_VER_0_7, + }, { + .name = "imx5x-ecspi", + .driver_data = SPI_IMX_VER_2_3, + }, { + /* sentinel */ + } +}; + static int __devinit spi_imx_probe(struct platform_device *pdev) { struct spi_imx_master *mxc_platform_info; @@ -536,6 +804,9 @@ init_completion(&spi_imx->xfer_done); + spi_imx->devtype_data = + spi_imx_devtype_data[pdev->id_entry->driver_data]; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "can't get platform resource\n"); @@ -556,7 +827,7 @@ } spi_imx->irq = platform_get_irq(pdev, 0); - if (spi_imx->irq <= 0) { + if (spi_imx->irq < 0) { ret = -EINVAL; goto out_iounmap; } @@ -567,24 +838,6 @@ goto out_iounmap; } - if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) { - spi_imx->intctrl = mx31_intctrl; - spi_imx->config = mx31_config; - spi_imx->trigger = mx31_trigger; - spi_imx->rx_available = mx31_rx_available; - } else if (cpu_is_mx27() || cpu_is_mx21()) { - spi_imx->intctrl = mx27_intctrl; - spi_imx->config = mx27_config; - spi_imx->trigger = mx27_trigger; - spi_imx->rx_available = mx27_rx_available; - } else if (cpu_is_mx1()) { - spi_imx->intctrl = mx1_intctrl; - spi_imx->config = mx1_config; - spi_imx->trigger = mx1_trigger; - spi_imx->rx_available = mx1_rx_available; - } else - BUG(); - spi_imx->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(spi_imx->clk)) { dev_err(&pdev->dev, "unable to get clock\n"); @@ -595,15 +848,9 @@ clk_enable(spi_imx->clk); spi_imx->spi_clk = clk_get_rate(spi_imx->clk); - if (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) - writel(1, spi_imx->base + MXC_RESET); - - /* drain receive buffer */ - if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) - while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR) - readl(spi_imx->base + MXC_CSPIRXDATA); + spi_imx->devtype_data.reset(spi_imx); - spi_imx->intctrl(spi_imx, 0); + spi_imx->devtype_data.intctrl(spi_imx, 0); ret = spi_bitbang_start(&spi_imx->bitbang); if (ret) { @@ -668,6 +915,7 @@ .name = DRIVER_NAME, .owner = THIS_MODULE, }, + .id_table = spi_imx_devtype, .probe = spi_imx_probe, .remove = __devexit_p(spi_imx_remove), }; diff -urN linux-2.6.35.3.fsl/drivers/usb/gadget/arcotg_udc.c linux-2.6.35.3.work/drivers/usb/gadget/arcotg_udc.c --- linux-2.6.35.3.fsl/drivers/usb/gadget/arcotg_udc.c 2015-11-23 20:06:25.987833705 +0100 +++ linux-2.6.35.3.work/drivers/usb/gadget/arcotg_udc.c 2015-11-22 16:44:15.323616896 +0100 @@ -2156,7 +2156,7 @@ /* For mx53 loco board, the debug ID value is 0 and * DO NOT support OTG function */ - if (!machine_is_mx53_loco()) + if (!machine_is_mx53_loco() && !machine_is_vmx53()) /* only handle device interrupt event */ if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) return false; diff -urN linux-2.6.35.3.fsl/drivers/video/backlight/pwm_bl.c linux-2.6.35.3.work/drivers/video/backlight/pwm_bl.c --- linux-2.6.35.3.fsl/drivers/video/backlight/pwm_bl.c 2015-11-23 20:06:25.995833705 +0100 +++ linux-2.6.35.3.work/drivers/video/backlight/pwm_bl.c 2015-11-22 16:44:15.323616896 +0100 @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -70,6 +71,26 @@ .check_fb = pwm_backlight_check_fb, }; +void pwm_backlight_set_brightness_led(struct led_classdev *led_cdev, enum led_brightness brightness) +{ + struct backlight_device *bl = dev_get_drvdata(led_cdev->dev->parent); + bl->props.brightness = (int) brightness; + pwm_backlight_update_status(bl); +} + +enum led_brightness pwm_backlight_get_brightness_led(struct led_classdev *led_cdev) +{ + struct backlight_device *bl = dev_get_drvdata(led_cdev->dev->parent); + return pwm_backlight_get_brightness(bl); +} + +static struct led_classdev pwm_backlight_led = { + .name = "lcd-backlight", + .brightness = 127, + .brightness_get = pwm_backlight_get_brightness_led, + .brightness_set = pwm_backlight_set_brightness_led, +}; + static int pwm_backlight_probe(struct platform_device *pdev) { struct backlight_properties props; @@ -122,6 +143,11 @@ backlight_update_status(bl); platform_set_drvdata(pdev, bl); + + // register leds lcd-backlight interface for Android + pwm_backlight_led.brightness = data->dft_brightness; + led_classdev_register(&pdev->dev, &pwm_backlight_led); + return 0; err_bl: @@ -140,6 +166,7 @@ struct backlight_device *bl = platform_get_drvdata(pdev); struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev); + led_classdev_unregister(&pwm_backlight_led); backlight_device_unregister(bl); pwm_config(pb->pwm, 0, pb->period); pwm_disable(pb->pwm); diff -urN linux-2.6.35.3.fsl/include/linux/input/edt-ft5x06.h linux-2.6.35.3.work/include/linux/input/edt-ft5x06.h --- linux-2.6.35.3.fsl/include/linux/input/edt-ft5x06.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.35.3.work/include/linux/input/edt-ft5x06.h 2015-11-22 16:44:15.323616896 +0100 @@ -0,0 +1,24 @@ +#ifndef _EDT_FT5X06_H +#define _EDT_FT5X06_H + +/* + * Copyright (c) 2012 Simon Budig, + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +struct edt_ft5x06_platform_data { + int irq_pin; + int reset_pin; + + /* startup defaults for operational parameters */ + bool use_parameters; + u8 gain; + u8 threshold; + u8 offset; + u8 report_rate; +}; + +#endif /* _EDT_FT5X06_H */