diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/board.c barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/board.c --- barebox-2012.09.0/arch/arm/boards/vmx53/board.c 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/board.c 2012-09-20 10:21:44.798264241 +0200 @@ -0,0 +1,348 @@ +/* + * Copyright (C) 2007 Sascha Hauer, Pengutronix + * Copyright (C) 2011 Marc Kleine-Budde + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_DRIVER_NET_FEC_IMX +static struct fec_platform_data fec_info = { + .xcv_type = RMII, + .phy_addr = 0x1F, +}; +#endif +#ifdef CONFIG_NAND_IMX +struct imx_nand_platform_data nand_info = { + .width = 1, + .hw_ecc = 1, + .flash_bbt = 1, +}; +#endif +#ifdef CONFIG_LED_GPIO +// LGPIO0 = GPIO3_29 +static struct gpio_led led0red = { + .led.name = "red", + .gpio = IMX_GPIO_NR(3, 29), //2 * 32 + 29, + .active_low = 0, +}; + +// LGPIO1 = GPIO2_31 +static struct gpio_led led1orange = { + .led.name = "orange", + .gpio = IMX_GPIO_NR(2, 31), //1 * 32 + 31, + .active_low = 0, +}; +#endif +#ifdef CONFIG_DRIVER_SPI_IMX + +#define VMX53_ECSPI1_CS0 IMX_GPIO_NR(2, 30) //(1 * 32 + 30) // GPIO2_30 +#define VMX53_ECSPI1_CS1 IMX_GPIO_NR(3, 19) //(2 * 32 + 19) // GPIO3_19 + +static int spi_0_cs[] = { VMX53_ECSPI1_CS0 , VMX53_ECSPI1_CS1 }; + +static struct spi_imx_master spi_0_data = { + .chipselect = spi_0_cs, + .num_chipselect = ARRAY_SIZE(spi_0_cs), +}; + +static const struct spi_board_info mx53_spi_board_info[] = { + { + .name = "m25p", + .max_speed_hz = 300000, + .bus_num = 0, + .chip_select = 0, + }, + { + .name = "m25p", + .max_speed_hz = 300000, + .bus_num = 0, + .chip_select = 1, + }, +}; +#endif +#ifdef CONFIG_MCI_IMX_ESDHC + +#define VMX53_SD1_SEL IMX_GPIO_NR(4, 0) +#define VMX53_SD1_CD IMX_GPIO_NR(3, 24) +//#define VMX53_SD1_WP +#define VMX53_SD2_CD IMX_GPIO_NR(3, 25) +#define VMX53_SD2_WP IMX_GPIO_NR(2, 19) + +static struct esdhc_platform_data vmx53_sd1_data = { + .cd_gpio = VMX53_SD1_CD, +// .wp_gpio = VMX53_SD1_WP, + .cd_type = ESDHC_CD_GPIO, + .wp_type = ESDHC_WP_NONE, +}; + +static struct esdhc_platform_data vmx53_sd2_data = { + .cd_gpio = VMX53_SD2_CD, + .wp_gpio = VMX53_SD2_WP, + .cd_type = ESDHC_CD_GPIO, + .wp_type = ESDHC_WP_GPIO, +}; +#endif +static iomux_v3_cfg_t vmx53_pads[] = { + /* UART1 */ + MX53_PAD_PATA_DIOW__UART1_TXD_MUX, + MX53_PAD_PATA_DMACK__UART1_RXD_MUX, + MX53_PAD_PATA_IORDY__UART1_RTS, + MX53_PAD_PATA_RESET_B__UART1_CTS, + /* NAND */ +#ifdef CONFIG_NAND_IMX + MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B, + MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B, + MX53_PAD_NANDF_ALE__EMI_NANDF_ALE, + MX53_PAD_NANDF_CLE__EMI_NANDF_CLE, + MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B, + MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0, + MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0, + //MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1, + MX53_PAD_PATA_DATA0__EMI_NANDF_D_0, + MX53_PAD_PATA_DATA1__EMI_NANDF_D_1, + MX53_PAD_PATA_DATA2__EMI_NANDF_D_2, + MX53_PAD_PATA_DATA3__EMI_NANDF_D_3, + MX53_PAD_PATA_DATA4__EMI_NANDF_D_4, + MX53_PAD_PATA_DATA5__EMI_NANDF_D_5, + MX53_PAD_PATA_DATA6__EMI_NANDF_D_6, + MX53_PAD_PATA_DATA7__EMI_NANDF_D_7, +#endif + /* FEC */ +#ifdef CONFIG_DRIVER_NET_FEC_IMX + MX53_PAD_FEC_MDC__FEC_MDC, + MX53_PAD_FEC_MDIO__FEC_MDIO, + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, + MX53_PAD_FEC_RX_ER__FEC_RX_ER, + MX53_PAD_FEC_CRS_DV__FEC_RX_DV, + MX53_PAD_FEC_RXD1__FEC_RDATA_1, + MX53_PAD_FEC_RXD0__FEC_RDATA_0, + MX53_PAD_FEC_TX_EN__FEC_TX_EN, + MX53_PAD_FEC_TXD1__FEC_TDATA_1, + MX53_PAD_FEC_TXD0__FEC_TDATA_0, + MX53_PAD_GPIO_11__GPIO4_1, // FEC_PEN + MX53_PAD_GPIO_12__GPIO4_2, // FEC_RST +#endif + /* ESDHC */ +#ifdef CONFIG_MCI_IMX_ESDHC + MX53_PAD_SD1_CMD__ESDHC1_CMD, + MX53_PAD_SD1_CLK__ESDHC1_CLK, + MX53_PAD_SD1_DATA0__ESDHC1_DAT0, + MX53_PAD_SD1_DATA1__ESDHC1_DAT1, + MX53_PAD_SD1_DATA2__ESDHC1_DAT2, + MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + MX53_PAD_SD2_CMD__ESDHC2_CMD, + MX53_PAD_SD2_CLK__ESDHC2_CLK, + MX53_PAD_SD2_DATA0__ESDHC2_DAT0, + MX53_PAD_SD2_DATA1__ESDHC2_DAT1, + MX53_PAD_SD2_DATA2__ESDHC2_DAT2, + MX53_PAD_SD2_DATA3__ESDHC2_DAT3, + MX53_PAD_GPIO_10__GPIO4_0, // SD1_SEL + MX53_PAD_EIM_D24__GPIO3_24, // SD1_CD + MX53_PAD_EIM_D25__GPIO3_25, // SD2_CD + MX53_PAD_EIM_A19__GPIO2_19, // SD2_WP +#endif + /* I2C */ +#ifdef CONFIG_I2C_IMX + MX53_PAD_EIM_D21__I2C1_SCL, + MX53_PAD_EIM_D28__I2C1_SDA, + MX53_PAD_GPIO_3__I2C3_SCL, + MX53_PAD_GPIO_6__I2C3_SDA, +#endif + /* SPI */ +#ifdef CONFIG_DRIVER_SPI_IMX + MX53_PAD_EIM_D16__ECSPI1_SCLK, + MX53_PAD_EIM_D17__ECSPI1_MISO, + MX53_PAD_EIM_D18__ECSPI1_MOSI, + MX53_PAD_GPIO_19__ECSPI1_RDY, +// MX53_PAD_EIM_D19__ECSPI1_SS1, +// MX53_PAD_EIM_EB2__ECSPI1_SS0, + MX53_PAD_EIM_D19__GPIO3_19, // SS1 + MX53_PAD_EIM_EB2__GPIO2_30, // SS0 +#endif + /* GPIO */ +#if CONFIG_LED_GPIO + MX53_PAD_EIM_D29__GPIO3_29, + MX53_PAD_EIM_EB3__GPIO2_31, +#endif + MX53_PAD_EIM_A24__GPIO5_4, // PSAVE + MX53_PAD_GPIO_17__GPIO7_12, // RESET_OUT +}; + +#define IMX_ESD_BASE 0x63fd9000 + + +static void set_ddr3_rows(void) +{ + uint32_t esdctl; + + writel(0x4000000, MX53_CSD0_BASE_ADDR); + writel(0x3000000, (uint32_t)MX53_CSD0_BASE_ADDR + 0x20000000); + writel(0x2000000, (uint32_t)MX53_CSD0_BASE_ADDR + 0x10000000); + + esdctl = (readl(IMX_ESD_BASE) & ~0x7000000); + esdctl |= readl(MX53_CSD0_BASE_ADDR); + + writel(esdctl, IMX_ESD_BASE); +} + +static int vmx53_mem_init(void) +{ + uchar rows, cols, dsiz, banks; + uint32_t size, esdctl, esdmsc; + + set_ddr3_rows(); + + esdctl = readl(IMX_ESD_BASE); + esdmsc = readl(IMX_ESD_BASE+0x18); + + rows = ((esdctl >> 24) & 7); + cols = (((esdctl >> 20)+1) & 3); + dsiz = ((esdctl >> 16) & 1); // 0=16bit, 1=32bit + banks = (~(esdmsc >> 5) & 1); // 0=4banks, 1=8banks + size = (esdctl)? 1 << (rows + cols + banks + dsiz + 22) : 0; + + if(size) + { + if( esdctl & 0x80000000) { + arm_add_mem_device("ram0", MX53_CSD0_BASE_ADDR, size); + + printk("SDRAM at 0x%08x: %dMB (DDR3 2x%dMb, %d ROWs, %d COLs, %d BANKs)\n", + MX53_CSD0_BASE_ADDR, size >> 20, size >> 18, rows + 11, cols + 8, 4 << banks); + } + if( esdctl & 0x40000000) { + arm_add_mem_device("ram1", MX53_CSD1_BASE_ADDR, size); + + printk("SDRAM at 0x%08x: %dMB (DDR3 2x%dMb, %d ROWs, %d COLs, %d BANKs)\n", + MX53_CSD1_BASE_ADDR, size >> 20, size >> 18, rows + 11, cols + 8, 4 << banks); + } + } + return 0; +} + +mem_initcall(vmx53_mem_init); + +#ifdef CONFIG_DRIVER_NET_FEC_IMX + +#define VMX53_FEC_PEN IMX_GPIO_NR(4, 1) +#define VMX53_FEC_RST IMX_GPIO_NR(4, 2) + +static void vmx53_fec_reset(void) +{ + gpio_direction_output(VMX53_FEC_RST, 0); // assert resset + gpio_direction_output(VMX53_FEC_PEN, 1); // enable 50MHz oscilator + mdelay(1); + gpio_set_value(VMX53_FEC_RST, 1); // deassert reset +} +#endif + +#define PSAVE IMX_GPIO_NR(5, 4) +#define RESET_OUT IMX_GPIO_NR(7, 12) + +static int vmx53_devices_init(void) +{ + gpio_direction_output(RESET_OUT, 0); // assert RESET_OUT + +#ifdef CONFIG_LED_GPIO + led_gpio_register(&led0red); + led_gpio_register(&led1orange); +#endif +#ifdef CONFIG_DRIVER_NET_FEC_IMX + imx53_iim_register_fec_ethaddr(); + imx53_add_fec(&fec_info); + vmx53_fec_reset(); +#endif +#ifdef CONFIG_MCI_IMX_ESDHC + gpio_direction_output(VMX53_SD1_SEL, 1); // 0 = module, 1 = baseboard + imx53_add_mmc0(&vmx53_sd1_data); + imx53_add_mmc1(&vmx53_sd2_data); +#endif +#ifdef CONFIG_DRIVER_SPI_IMX + gpio_direction_output(VMX53_ECSPI1_CS0,1); + gpio_direction_output(VMX53_ECSPI1_CS1,1); + + spi_register_board_info(mx53_spi_board_info, + ARRAY_SIZE(mx53_spi_board_info)); + imx53_add_spi0(&spi_0_data); +#endif +#ifdef CONFIG_I2C_IMX + imx53_add_i2c0(NULL); + imx53_add_i2c2(NULL); +#endif +#ifdef CONFIG_NAND_IMX + imx53_add_nand(&nand_info); +#endif + armlinux_set_bootparams((void *)0x70000100); +// armlinux_set_revision(0x53000|imx_silicon_revision()); + armlinux_set_architecture(MACH_TYPE_VMX53); + + gpio_direction_output(RESET_OUT, 1); // deassert RESET_OUT + + return 0; +} + +device_initcall(vmx53_devices_init); + +static int vmx53_part_init(void) +{ +#ifdef CONFIG_NAND_IMX + devfs_add_partition("nand0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self_raw"); + dev_add_bb_dev("self_raw", "self0"); + + devfs_add_partition("nand0", 0x60000, 0xA0000, DEVFS_PARTITION_FIXED, "env_raw"); + dev_add_bb_dev("env_raw", "env0"); +#else + devfs_add_partition("m25p1", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self0"); + devfs_add_partition("m25p1", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); +#endif + return 0; +} +late_initcall(vmx53_part_init); + +static int vmx53_console_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(vmx53_pads, ARRAY_SIZE(vmx53_pads)); + + imx53_init_lowlevel(800); + + imx53_add_uart0(); + + return 0; +} + +console_initcall(vmx53_console_init); diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/config.h barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/config.h --- barebox-2012.09.0/arch/arm/boards/vmx53/config.h 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/config.h 2012-09-19 21:13:01.024943203 +0200 @@ -0,0 +1,24 @@ +/** + * @file + * @brief Global defintions for the ARM i.MX51 based babbage board + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#endif /* __CONFIG_H */ diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/boot barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/boot --- barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/boot 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/boot 2012-09-19 21:13:01.024943203 +0200 @@ -0,0 +1,65 @@ +#!/bin/sh + +. /env/config + +image=/dev/nand0.kernel.bb + +if [ x$1 = xjffS2 ]; then + root=jffs2 + kernel=nand +fi + +if [ x$1 = xubifs ]; then + root=ubifs + kernel=nand +fi + +if [ x$1 = xnet ]; then + root=net + kernel=net + image=$zimage +fi + +if [ $# = 2 ]; then + image=$2 +fi + +if [ x$ip = xdhcp ]; then + if [ x$root = xnet ]; then + bootargs="$bootargs ip=dhcp" + fi +else + if [ x$ip = xoff ]; then + bootargs="$bootargs ip=off" + else + bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::" + fi +fi + +if [ x$root = xjffs2 ]; then + bootargs="$bootargs root=/dev/mtdblock$rootpartnum_nand rootfstype=jffs2" +fi + +if [ x$root = xubifs ]; then + bootargs="$bootargs root=ubi0:$ubiroot ubi.mtd=$rootpartnum_nand rootfstype=ubifs" +fi + +if [ x$root = xnet ]; then + bootargs="$bootargs root=/dev/nfs" + if [ ! -z "$rootpath" ]; then + bootargs="$bootargs nfsroot=$eth0.serverip:$rootpath" + fi +fi + +bootargs="$bootargs mtdparts=vmx_nand:$nand_parts" + +if [ $kernel = net ]; then + if [ x$ip = xdhcp ]; then + dhcp + fi + tftp $image zImage || exit 1 + bootz zImage +else + bootz $image +fi + diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/debug barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/debug --- barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/debug 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/debug 2012-09-19 21:13:01.024943203 +0200 @@ -0,0 +1,28 @@ +#!/bin/sh + +. /env/config + +if [ x$ip = xdhcp ]; then + dhcp +fi + +bbdev=barebox-dev.bin +image=$basedir/$bbdev + +if [ $# = 1 ]; then + image=$1 +fi + +ping $eth0.serverip + +if [ $? -ne 0 ] ; then + echo "server not found" + exit 1 +fi + +tftp $image $bbdev + +if [ -e $bbdev ]; then + memcpy -s $bbdev 0 0x70000000 + go 0x70000000 +fi diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/init barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/init --- barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/init 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/init 2012-09-19 21:13:01.024943203 +0200 @@ -0,0 +1,41 @@ +#!/bin/sh + +PATH=/env/bin +export PATH + +. /env/config + +if [ -e /dev/nand0 ]; then + addpart /dev/nand0 $nand_parts + + # hush workaround + nand0_parts="/dev/nand0.*" + nand -a $nand0_parts +fi + +if [ -f /env/logo.bmp ]; then + bmp /env/logo.bmp +elif [ -f /env/logo.bmp.lzo ]; then + unlzo /env/logo.bmp.lzo /logo.bmp + bmp /logo.bmp +fi + +#if [ -z $eth0.ethaddr ]; then +# while [ -z $eth0.ethaddr ]; do +# readline "No MAC address set for eth0. Please enter the one found on your module: " eth0.ethaddr +# done +# echo -a /env/config "eth0.ethaddr=$eth0.ethaddr" +# saveenv +#fi + +echo +echo -n "Hit any key to stop autoboot: " +timeout -a $autoboot_timeout +if [ $? != 0 ]; then + exit +fi + +boot + + + diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/update barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/update --- barebox-2012.09.0/arch/arm/boards/vmx53/env/bin/update 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/bin/update 2012-09-19 21:13:01.024943203 +0200 @@ -0,0 +1,63 @@ +#!/bin/sh + +. /env/config + +if [ x$1 = xbarebox ]; then + image=$barebox + part=/dev/nand0.barebox.bb +fi + +if [ x$1 = xkernel ]; then + image=$zimage + part=/dev/nand0.kernel.bb +fi + +if [ x$1 = xrootfs ]; then + image=$rootfs + part=/dev/nand0.rootfs +fi + +if [ -z "$part" -o -z "$image" ]; then + echo "update barebox|kernel|rootfs []" + exit 1 +fi + +if [ ! -e "$part" ]; then + echo "Partition $part does not exist" + exit 1 +fi + +if [ $# = 2 ]; then + image=$2 +fi + +if [ x$ip = xdhcp ]; then + dhcp +fi + +ping $eth0.serverip +if [ $? -ne 0 ] ; then + echo "update aborted" + exit 1 +fi + +unprotect $part + +echo +echo "erasing partition $part" +erase $part + +if [ x$1 = xrootfs ]; then + echo + echo "attaching UBI to $part" + ubiattach $part + ubimkvol /dev/ubi0 rootfs 0 + + part=/dev/ubi0.rootfs +fi + +echo +echo "flashing $image to $part" +echo +tftp $image $part + diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/env/config barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/config --- barebox-2012.09.0/arch/arm/boards/vmx53/env/config 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/env/config 2012-09-19 21:13:01.024943203 +0200 @@ -0,0 +1,32 @@ +#!/bin/sh + +# can be either 'net' or 'jffs2' or 'ubifs' +kernel=nand +root=ubifs + +basedir=vmx53 +barebox=$basedir/barebox.bin +zimage=$basedir/zImage +rootfs=$basedir/rootfs.bin + +autoboot_timeout=3 + +# vmx53 modes +# video=mxcdi0fb:RGB24,[VGA|SVGA|XGA|WXGA|UXGA|OPTREX|DATAIMAGE],bpp=[16|24|32] +bootargs="console=ttymxc0,115200 otg_mode=host video=mxcdi0fb:RGB24,XGA,bpp=16" + +nand_parts="384k(barebox)ro,640k(bareboxenv),4M(kernel),-(rootfs)" +spi_parts="384k(barebox)ro,128k(bareboxenv),-(kernel)" +rootpartnum_nand=3 +ubiroot="rootfs" + +# ip=off|static|dhcp +# use 'dhcp' to do dhcp in barebox and in kernel +ip=dhcp + +# or set your networking parameters here +#eth0.ipaddr=a.b.c.d +#eth0.netmask=a.b.c.d +#eth0.gateway=a.b.c.d +#eth0.serverip=a.b.c.d +#eth0.ethaddr=00:01:02:03:04:05 diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/flash_header.c barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/flash_header.c --- barebox-2012.09.0/arch/arm/boards/vmx53/flash_header.c 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/flash_header.c 2012-09-19 21:24:57.077415545 +0200 @@ -0,0 +1,108 @@ +/* + * Copyright (C) 2011 Marc Kleine-Budde + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +void __naked __flash_header_start go(void) +{ +// barebox_arm_head(); + __asm__ __volatile__("b reset\n"); +#ifdef CONFIG_ARCH_IMX_INTERNAL_BOOT_NAND + __asm__ __volatile__(".word 0x20424346\n"); // ASCII Fingerprint = "FCB " + __asm__ __volatile__(".word 0x00000001\n"); // FCB version +#endif +} + +struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = { + { .addr = cpu_to_be32(0x53fa8554), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8558), .val = cpu_to_be32(0x00300040), }, + { .addr = cpu_to_be32(0x53fa8560), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8564), .val = cpu_to_be32(0x00300040), }, + { .addr = cpu_to_be32(0x53fa8568), .val = cpu_to_be32(0x00300040), }, + { .addr = cpu_to_be32(0x53fa8570), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8574), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8578), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa857c), .val = cpu_to_be32(0x00300040), }, + { .addr = cpu_to_be32(0x53fa8580), .val = cpu_to_be32(0x00300040), }, + { .addr = cpu_to_be32(0x53fa8584), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8588), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8590), .val = cpu_to_be32(0x00300040), }, + { .addr = cpu_to_be32(0x53fa8594), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa86f0), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa86f4), .val = cpu_to_be32(0x00000000), }, + { .addr = cpu_to_be32(0x53fa86fc), .val = cpu_to_be32(0x00000000), }, + { .addr = cpu_to_be32(0x53fa8714), .val = cpu_to_be32(0x00000000), }, + { .addr = cpu_to_be32(0x53fa8718), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa871c), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8720), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa8724), .val = cpu_to_be32(0x04000000), }, + { .addr = cpu_to_be32(0x53fa8728), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x53fa872c), .val = cpu_to_be32(0x00300000), }, + { .addr = cpu_to_be32(0x63fd9088), .val = cpu_to_be32(0x35343535), }, + { .addr = cpu_to_be32(0x63fd9090), .val = cpu_to_be32(0x4d444c44), }, + { .addr = cpu_to_be32(0x63fd907c), .val = cpu_to_be32(0x01370138), }, + { .addr = cpu_to_be32(0x63fd9080), .val = cpu_to_be32(0x013b013c), }, + { .addr = cpu_to_be32(0x63fd9018), .val = cpu_to_be32(0x00011740), }, +// { .addr = cpu_to_be32(0x63fd9000), .val = cpu_to_be32(0xc3190000), }, + { .addr = cpu_to_be32(0x63fd9000), .val = cpu_to_be32(0xc4190000), }, + { .addr = cpu_to_be32(0x63fd900c), .val = cpu_to_be32(0x9f5152e3), }, + { .addr = cpu_to_be32(0x63fd9010), .val = cpu_to_be32(0xb68e8a63), }, + { .addr = cpu_to_be32(0x63fd9014), .val = cpu_to_be32(0x01ff00db), }, + { .addr = cpu_to_be32(0x63fd902c), .val = cpu_to_be32(0x000026d2), }, + { .addr = cpu_to_be32(0x63fd9030), .val = cpu_to_be32(0x009f0e21), }, + { .addr = cpu_to_be32(0x63fd9008), .val = cpu_to_be32(0x12273030), }, + { .addr = cpu_to_be32(0x63fd9004), .val = cpu_to_be32(0x0002002d), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00008032), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00008033), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00028031), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x052080b0), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x04008040), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x0000803a), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x0000803b), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00028039), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x05208138), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x04008048), }, + { .addr = cpu_to_be32(0x63fd9020), .val = cpu_to_be32(0x00005800), }, + { .addr = cpu_to_be32(0x63fd9040), .val = cpu_to_be32(0x04b80003), }, + { .addr = cpu_to_be32(0x63fd9058), .val = cpu_to_be32(0x00022227), }, + { .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00000000), }, +}; + +#define APP_DEST CONFIG_TEXT_BASE + +struct imx_flash_header_v2 __flash_header_section flash_header = { + .header.tag = IVT_HEADER_TAG, + .header.length = cpu_to_be16(32), + .header.version = IVT_VERSION, + + .entry = APP_DEST + 0x2000, + .dcd_ptr = APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, dcd), + .boot_data_ptr = APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, boot_data), + .self = APP_DEST + 0x400, + + .boot_data.start = APP_DEST, + .boot_data.size = 0x40000, + + .dcd.header.tag = DCD_HEADER_TAG, + .dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)), + .dcd.header.version = DCD_VERSION, + + .dcd.command.tag = DCD_COMMAND_WRITE_TAG, + .dcd.command.length = cpu_to_be16(sizeof(struct imx_dcd_command) + sizeof(dcd_entry)), + .dcd.command.param = DCD_COMMAND_WRITE_PARAM, +}; diff -urN barebox-2012.09.0/arch/arm/boards/vmx53/Makefile barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/Makefile --- barebox-2012.09.0/arch/arm/boards/vmx53/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/boards/vmx53/Makefile 2012-09-19 21:13:01.024943203 +0200 @@ -0,0 +1,2 @@ +obj-y += board.o +obj-y += flash_header.o diff -urN barebox-2012.09.0/arch/arm/configs/vmx53_defconfig barebox-2012.09.0-vmx53/arch/arm/configs/vmx53_defconfig --- barebox-2012.09.0/arch/arm/configs/vmx53_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2012.09.0-vmx53/arch/arm/configs/vmx53_defconfig 2012-09-23 23:20:50.106197604 +0200 @@ -0,0 +1,417 @@ +# +# Automatically generated file; DO NOT EDIT. +# Barebox/arm 2012.09.0 Configuration +# +CONFIG_ARM=y +CONFIG_ARM_LINUX=y + +# +# System Type +# +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_EP93XX is not set +CONFIG_ARCH_IMX=y +# CONFIG_ARCH_MXS is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_S3C24xx is not set +# CONFIG_ARCH_S3C64xx is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_TEGRA is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y + +# +# processor features +# +# CONFIG_BOOT_ENDIANNESS_SWITCH is not set +CONFIG_ARCH_TEXT_BASE=0x7ff00000 +CONFIG_BOARDINFO="Voipac VMX53" +CONFIG_ARCH_IMX_INTERNAL_BOOT=y +CONFIG_ARCH_IMX_INTERNAL_BOOT_NAND=y +# CONFIG_ARCH_IMX_INTERNAL_BOOT_NOR is not set +# CONFIG_ARCH_IMX_INTERNAL_BOOT_ONENAND is not set +# CONFIG_ARCH_IMX_INTERNAL_BOOT_SERIAL is not set + +# +# Freescale i.MX System-on-Chip +# +# CONFIG_ARCH_IMX1 is not set +# CONFIG_ARCH_IMX21 is not set +# CONFIG_ARCH_IMX25 is not set +# CONFIG_ARCH_IMX27 is not set +# CONFIG_ARCH_IMX31 is not set +# CONFIG_ARCH_IMX35 is not set +# CONFIG_ARCH_IMX51 is not set +CONFIG_ARCH_IMX53=y +# CONFIG_ARCH_IMX6 is not set +CONFIG_MACH_VMX53=y +# CONFIG_MACH_FREESCALE_MX53_LOCO is not set +# CONFIG_MACH_FREESCALE_MX53_SMD is not set +# CONFIG_MACH_TQMA53 is not set + +# +# Board specific settings +# + +# +# i.MX specific settings +# +CONFIG_IMX_IIM=y +CONFIG_IMX_IIM_FUSE_BLOW=y +CONFIG_AEABI=y +# CONFIG_THUMB2_BAREBOX is not set + +# +# Arm specific settings +# +CONFIG_CMD_ARM_CPUINFO=y +# CONFIG_CMD_ARM_MMUINFO is not set +# CONFIG_CPU_V7_DCACHE_SKIP is not set +# CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS is not set +CONFIG_ARM_EXCEPTIONS=y +# CONFIG_ARM_UNWIND is not set +CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG" +CONFIG_HAS_KALLSYMS=y +CONFIG_HAS_MODULES=y +CONFIG_CMD_MEMORY=y +CONFIG_ENV_HANDLING=y +CONFIG_GENERIC_GPIO=y +CONFIG_BLOCK=y +CONFIG_FILETYPE=y +CONFIG_BINFMT=y +CONFIG_STDDEV=y + +# +# General Settings +# +CONFIG_LOCALVERSION="-vmx53-vpac0" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BANNER=y +CONFIG_ENVIRONMENT_VARIABLES=y + +# +# memory layout +# +# CONFIG_MMU is not set +CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y +CONFIG_TEXT_BASE=0x7ff00000 +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0xffffffff +CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0xffffffff +CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y +CONFIG_MEMORY_LAYOUT_DEFAULT=y +# CONFIG_MEMORY_LAYOUT_FIXED is not set +CONFIG_STACK_SIZE=0x8000 +CONFIG_MALLOC_SIZE=0x800000 +# CONFIG_BROKEN is not set +# CONFIG_EXPERIMENTAL is not set +CONFIG_MALLOC_DLMALLOC=y +# CONFIG_MALLOC_TLSF is not set +# CONFIG_KALLSYMS is not set +CONFIG_PROMPT="barebox:" +CONFIG_BAUDRATE=115200 +CONFIG_LONGHELP=y +CONFIG_CBSIZE=1024 +CONFIG_MAXARGS=16 +CONFIG_SHELL_HUSH=y +# CONFIG_SHELL_SIMPLE is not set +CONFIG_GLOB=y +# CONFIG_GLOB_SORT is not set +CONFIG_PROMPT_HUSH_PS2="> " +# CONFIG_HUSH_FANCY_PROMPT is not set +# CONFIG_HUSH_GETOPT is not set +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +# CONFIG_PASSWORD is not set +CONFIG_DYNAMIC_CRC_TABLE=y +CONFIG_ERRNO_MESSAGES=y +# CONFIG_TIMESTAMP is not set +CONFIG_CONSOLE_FULL=y +CONFIG_CONSOLE_ACTIVATE_FIRST=y +CONFIG_PARTITION=y +CONFIG_PARTITION_DISK=y +CONFIG_PARTITION_DISK_DOS=y +CONFIG_DEFAULT_ENVIRONMENT=y +CONFIG_DEFAULT_ENVIRONMENT_COMPRESSED=y +CONFIG_DEFAULT_ENVIRONMENT_COMPRESSED_GZIP=y +# CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW is not set +# CONFIG_DEFAULT_ENVIRONMENT_GENERIC is not set +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/vmx53/env" +# CONFIG_BAREBOXENV_TARGET is not set +CONFIG_POLLER=y + +# +# Debugging +# +# CONFIG_DEBUG_INFO is not set +# CONFIG_ENABLE_FLASH_NOISE is not set +# CONFIG_ENABLE_PARTITION_NOISE is not set +# CONFIG_ENABLE_DEVICE_NOISE is not set +CONFIG_COMMAND_SUPPORT=y +# CONFIG_HAS_POWEROFF is not set + +# +# commands +# + +# +# scripting +# +CONFIG_CMD_EDIT=y +CONFIG_CMD_SLEEP=y +# CONFIG_CMD_MSLEEP is not set +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TRUE=y +CONFIG_CMD_FALSE=y +# CONFIG_CMD_LOGIN is not set +# CONFIG_CMD_PASSWD is not set +# CONFIG_CMD_TIME is not set +# CONFIG_CMD_GLOBAL is not set + +# +# file commands +# +CONFIG_CMD_LS=y +CONFIG_CMD_RM=y +CONFIG_CMD_CAT=y +CONFIG_CMD_MKDIR=y +CONFIG_CMD_RMDIR=y +CONFIG_CMD_CP=y +CONFIG_CMD_PWD=y +CONFIG_CMD_CD=y +CONFIG_CMD_MOUNT=y +CONFIG_CMD_UMOUNT=y +CONFIG_CMD_NAND=y +CONFIG_CMD_NANDTEST=y +# CONFIG_CMD_AUTOMOUNT is not set +# CONFIG_CMD_BASENAME is not set +# CONFIG_CMD_DIRNAME is not set + +# +# console +# +CONFIG_CMD_CLEAR=y +CONFIG_CMD_ECHO=y +# CONFIG_CMD_ECHO_E is not set + +# +# memory +# +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADY is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_IOMEM=y +# CONFIG_CMD_CRC is not set +CONFIG_CMD_DIGEST=y +CONFIG_CMD_MD5SUM=y +# CONFIG_CMD_SHA1SUM is not set +# CONFIG_CMD_SHA256SUM is not set +# CONFIG_CMD_SHA224SUM is not set +CONFIG_CMD_MTEST=y +# CONFIG_CMD_MTEST_ALTERNATIVE is not set + +# +# flash +# +CONFIG_CMD_FLASH=y +CONFIG_CMD_UBI=y + +# +# booting +# +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_UIMAGE is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +# CONFIG_CMD_OFTREE is not set +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_TEST=y +CONFIG_CMD_VERSION=y +CONFIG_CMD_HELP=y +CONFIG_CMD_MAGICVAR=y +# CONFIG_CMD_MAGICVAR_HELP is not set +CONFIG_CMD_DEVINFO=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_I2C=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y +CONFIG_NET=y +CONFIG_NET_DHCP=y +# CONFIG_NET_NFS is not set +CONFIG_NET_PING=y +CONFIG_NET_TFTP=y +CONFIG_NET_TFTP_PUSH=y +CONFIG_NET_NETCONSOLE=y +# CONFIG_NET_RESOLV is not set + +# +# Drivers +# + +# +# serial drivers +# +# CONFIG_DRIVER_SERIAL_ARM_DCC is not set +CONFIG_DRIVER_SERIAL_IMX=y +# CONFIG_DRIVER_SERIAL_NS16550 is not set +CONFIG_ARCH_HAS_FEC_IMX=y +CONFIG_MIIDEV=y + +# +# Network drivers +# +# CONFIG_DRIVER_NET_SMC911X is not set +# CONFIG_DRIVER_NET_SMC91111 is not set +CONFIG_DRIVER_NET_FEC_IMX=y +# CONFIG_DRIVER_NET_KS8851_MLL is not set + +# +# SPI drivers +# +CONFIG_SPI=y +CONFIG_DRIVER_SPI_IMX=y +CONFIG_DRIVER_SPI_IMX_2_3=y +CONFIG_I2C=y + +# +# I2C Hardware Bus support +# +CONFIG_I2C_IMX=y + +# +# flash drivers +# +# CONFIG_DRIVER_CFI is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_SST25L is not set +CONFIG_MTD=y +CONFIG_MTD_WRITE=y +CONFIG_MTD_OOB_DEVICE=y +# CONFIG_MTD_RAW_DEVICE is not set + +# +# Self contained MTD devices +# +# CONFIG_MTD_DOCG3 is not set +CONFIG_NAND=y +# CONFIG_NAND_ECC_SOFT is not set +CONFIG_NAND_ECC_HW=y +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set +CONFIG_NAND_INFO=y +CONFIG_NAND_READ_OOB=y +CONFIG_NAND_BBT=y +CONFIG_NAND_IMX=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND_IDS=y +CONFIG_UBI=y +CONFIG_DISK=y +# CONFIG_DISK_WRITE is not set + +# +# drive types +# +# CONFIG_DISK_ATA is not set + +# +# interface types +# +# CONFIG_DISK_INTF_PLATFORM_IDE is not set +# CONFIG_USB is not set +# CONFIG_USB_GADGET is not set +CONFIG_USB_HAVE_GADGET_DRIVER=y +# CONFIG_VIDEO is not set +CONFIG_MCI=y + +# +# --- Feature list --- +# +# CONFIG_MCI_STARTUP is not set +CONFIG_MCI_INFO=y +# CONFIG_MCI_WRITE is not set + +# +# --- MCI host drivers --- +# +CONFIG_MCI_IMX_ESDHC=y +# CONFIG_MCI_IMX_ESDHC_PIO is not set +# CONFIG_MCI_SPI is not set + +# +# MFD +# +# CONFIG_MFD_MC13XXX is not set +# CONFIG_I2C_MC34704 is not set +# CONFIG_I2C_MC34708 is not set +# CONFIG_I2C_MC9SDZ60 is not set +# CONFIG_I2C_LP3972 is not set +# CONFIG_I2C_TWL4030 is not set +# CONFIG_I2C_TWL6030 is not set +CONFIG_LED=y +CONFIG_LED_GPIO=y +# CONFIG_LED_GPIO_RGB is not set +CONFIG_LED_TRIGGERS=y + +# +# EEPROM support +# +# CONFIG_EEPROM_AT25 is not set + +# +# Input device support +# +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_IMX_KEYPAD is not set +# CONFIG_WATCHDOG is not set +# CONFIG_PWM is not set + +# +# DMA support +# + +# +# Filesystem support +# +# CONFIG_FS_CRAMFS is not set +CONFIG_FS_RAMFS=y +CONFIG_FS_DEVFS=y +# CONFIG_FS_TFTP is not set +# CONFIG_FS_NFS is not set +CONFIG_FS_FAT=y +# CONFIG_FS_FAT_WRITE is not set +CONFIG_FS_FAT_LFN=y +CONFIG_PARTITION_NEED_MTD=y + +# +# Library routines +# +CONFIG_PARAMETER=y +CONFIG_UNCOMPRESS=y +CONFIG_ZLIB=y +# CONFIG_BZLIB is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_PROCESS_ESCAPE_SEQUENCE is not set +# CONFIG_LZO_DECOMPRESS is not set +CONFIG_CRC32=y +CONFIG_DIGEST=y +CONFIG_MD5=y +# CONFIG_SHA1 is not set +# CONFIG_SHA224 is not set +# CONFIG_SHA256 is not set diff -urN barebox-2012.09.0/arch/arm/mach-imx/include/mach/devices-imx53.h barebox-2012.09.0-vmx53/arch/arm/mach-imx/include/mach/devices-imx53.h --- barebox-2012.09.0/arch/arm/mach-imx/include/mach/devices-imx53.h 2012-09-05 12:57:01.000000000 +0200 +++ barebox-2012.09.0-vmx53/arch/arm/mach-imx/include/mach/devices-imx53.h 2012-09-19 21:13:01.024943203 +0200 @@ -21,6 +21,11 @@ return imx_add_i2c((void *)MX53_I2C2_BASE_ADDR, 1, pdata); } +static inline struct device_d *imx53_add_i2c2(struct i2c_platform_data *pdata) +{ + return imx_add_i2c((void *)MX53_I2C3_BASE_ADDR, 2, pdata); +} + static inline struct device_d *imx53_add_uart0(void) { return imx_add_uart((void *)MX53_UART1_BASE_ADDR, 0); diff -urN barebox-2012.09.0/arch/arm/mach-imx/include/mach/iomux-mx53.h barebox-2012.09.0-vmx53/arch/arm/mach-imx/include/mach/iomux-mx53.h --- barebox-2012.09.0/arch/arm/mach-imx/include/mach/iomux-mx53.h 2012-09-05 12:57:01.000000000 +0200 +++ barebox-2012.09.0-vmx53/arch/arm/mach-imx/include/mach/iomux-mx53.h 2012-09-19 21:13:01.024943203 +0200 @@ -573,7 +573,7 @@ #define MX53_PAD_EIM_D28__UART2_CTS IOMUX_PAD(0x494, 0x14C, 2, __NA_, 0, MX53_UART_PAD_CTRL) #define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO IOMUX_PAD(0x494, 0x14C, 3, 0x82C, 1, NO_PAD_CTRL) #define MX53_PAD_EIM_D28__CSPI_MOSI IOMUX_PAD(0x494, 0x14C, 4, 0x788, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__I2C1_SDA IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, PAD_CTRL_I2C) +#define MX53_PAD_EIM_D28__I2C1_SDA IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, NO_PAD_CTRL) #define MX53_PAD_EIM_D28__IPU_EXT_TRIG IOMUX_PAD(0x494, 0x14C, 6, __NA_, 0, NO_PAD_CTRL) #define MX53_PAD_EIM_D28__IPU_DI0_PIN13 IOMUX_PAD(0x494, 0x14C, 7, __NA_, 0, NO_PAD_CTRL) #define MX53_PAD_EIM_D29__EMI_WEIM_D_29 IOMUX_PAD(0x498, 0x150, 0, __NA_, 0, NO_PAD_CTRL) diff -urN barebox-2012.09.0/arch/arm/mach-imx/Kconfig barebox-2012.09.0-vmx53/arch/arm/mach-imx/Kconfig --- barebox-2012.09.0/arch/arm/mach-imx/Kconfig 2012-09-05 12:57:01.000000000 +0200 +++ barebox-2012.09.0-vmx53/arch/arm/mach-imx/Kconfig 2012-09-19 21:13:01.037427854 +0200 @@ -2,6 +2,7 @@ config ARCH_TEXT_BASE hex + default 0x7ff00000 if MACH_VMX53 default 0x83f00000 if MACH_EUKREA_CPUIMX25 default 0xa0000000 if MACH_EUKREA_CPUIMX27 default 0x87f00000 if MACH_EUKREA_CPUIMX35 @@ -29,6 +30,7 @@ default 0x4fc00000 if MACH_SABRELITE config BOARDINFO + default "Voipac VMX53" if MACH_VMX53 default "Eukrea CPUIMX25" if MACH_EUKREA_CPUIMX25 default "Eukrea CPUIMX27" if MACH_EUKREA_CPUIMX27 default "Eukrea CPUIMX35" if MACH_EUKREA_CPUIMX35 @@ -443,6 +445,13 @@ prompt "i.MX53 Board Type" +config MACH_VMX53 + bool "Voipac VMX53" +# select MACH_HAS_LOWLEVEL_INIT + help + Say Y here if you are using the Voipac Technologies VMX53 module + equipped with a Freescale i.MX53 Processor + config MACH_FREESCALE_MX53_LOCO bool "Freescale i.MX53 LOCO" diff -urN barebox-2012.09.0/arch/arm/Makefile barebox-2012.09.0-vmx53/arch/arm/Makefile --- barebox-2012.09.0/arch/arm/Makefile 2012-09-05 12:57:01.000000000 +0200 +++ barebox-2012.09.0-vmx53/arch/arm/Makefile 2012-09-19 21:13:01.037427854 +0200 @@ -65,6 +65,7 @@ # Board directory name. This list is sorted alphanumerically # by CONFIG_* macro name. +board-$(CONFIG_MACH_VMX53) := vmx53 board-$(CONFIG_MACH_A9M2410) := a9m2410 board-$(CONFIG_MACH_A9M2440) := a9m2440 board-$(CONFIG_MACH_AT91RM9200EK) := at91rm9200ek diff -urN barebox-2012.09.0/drivers/nor/m25p80.c barebox-2012.09.0-vmx53/drivers/nor/m25p80.c --- barebox-2012.09.0/drivers/nor/m25p80.c 2012-09-05 12:57:01.000000000 +0200 +++ barebox-2012.09.0-vmx53/drivers/nor/m25p80.c 2012-09-19 21:13:01.037427854 +0200 @@ -548,6 +548,7 @@ { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) }, { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) }, + { "at25df081", INFO(0x1f4502, 0, 64 * 1024, 16, SECT_4K) }, { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) }, { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) }, @@ -596,6 +597,7 @@ { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K) }, { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K) }, { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K) }, + { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024,128, SECT_4K) }, { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K) }, { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) }, { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) }, diff -urN barebox-2012.09.0/drivers/spi/spi.c barebox-2012.09.0-vmx53/drivers/spi/spi.c --- barebox-2012.09.0/drivers/spi/spi.c 2012-09-05 12:57:01.000000000 +0200 +++ barebox-2012.09.0-vmx53/drivers/spi/spi.c 2012-09-19 21:13:01.037427854 +0200 @@ -91,6 +91,7 @@ goto fail; } + proxy->dev.id = -1; register_device(&proxy->dev); return proxy;