diff -urN barebox-2014.03.0.orig/arch/arm/boards/Makefile barebox-2014.03.0.work/arch/arm/boards/Makefile --- barebox-2014.03.0.orig/arch/arm/boards/Makefile 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/Makefile 2014-03-22 13:39:07.802559032 +0100 @@ -94,6 +94,7 @@ obj-$(CONFIG_MACH_USB_A9260) += usb-a926x/ obj-$(CONFIG_MACH_USB_A9263) += usb-a926x/ obj-$(CONFIG_MACH_USB_A9G20) += usb-a926x/ +obj-$(CONFIG_MACH_VMX25) += vmx25/ obj-$(CONFIG_MACH_VERSATILEPB) += versatile/ obj-$(CONFIG_MACH_VEXPRESS) += vexpress/ obj-$(CONFIG_MACH_ZEDBOARD) += avnet-zedboard/ diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/board.c barebox-2014.03.0.work/arch/arm/boards/vmx25/board.c --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/board.c 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/board.c 2015-11-29 16:35:31.311351997 +0100 @@ -0,0 +1,330 @@ +/* + * (C) 2011 Pengutronix, Sascha Hauer + * (c) 2014 Voipac + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#define pr_fmt(fmt) "vmx25: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define VMX25_RESET_OUT_GPIO IMX_GPIO_NR(3, 18) +#define VMX25_SD1_SEL_GPIO IMX_GPIO_NR(4, 10) + + +static iomux_v3_cfg_t vmx25_sys_pads[] = { + MX25_PAD_VSTBY_ACK__GPIO_3_18, // RESET_OUT + MX25_PAD_D10__GPIO_4_10, // SD1_SEL +}; + +static int vmx25_mem_init(void) +{ +#ifdef CONFIG_MEMINFO + uint32_t rows, cols, size; + uint32_t esdctl; + uint32_t esdctl0reg = MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL0; + uint32_t esdctl1reg = MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL1; + + esdctl = readl(esdctl0reg); + rows = (esdctl & ESDCTL0_ROW_MASK) >> 24; + cols = (esdctl & ESDCTL0_COL_MASK) >> 20; + size = (esdctl) ? 1 << (rows + cols + 22) : 0; + + printk("SDRAM at 0x%08x: %dMB (%dMb, %d ROWs, %d COLs)\n", + MX25_CSD0_BASE_ADDR, size >> 20, size >> 17, rows + 11, cols + 8); + + esdctl = readl(esdctl1reg); + rows = (esdctl & ESDCTL0_ROW_MASK) >> 24; + cols = (esdctl & ESDCTL0_COL_MASK) >> 20; + size = (esdctl) ? 1 << (rows + cols + 22) : 0; + + printk("SDRAM at 0x%08x: %dMB (%dMb, %d ROWs, %d COLs)\n", + MX25_CSD1_BASE_ADDR, size >> 20, size >> 17, rows + 11, cols + 8); +#endif + + return 0; +} +mem_initcall(vmx25_mem_init); + +#ifdef CONFIG_DRIVER_NET_FEC_IMX +#define VMX25_FEC_CLK_GPIO IMX_GPIO_NR(4, 9) +#define VMX25_FEC_RST_GPIO IMX_GPIO_NR(4, 7) + +static struct vmx25_fec_gpio_setup { + iomux_v3_cfg_t pad; + unsigned gpio:9, + dir:1, + level:1; +} vmx25_fec_gpios[] = { + { MX25_PAD_D13__GPIO_4_7, VMX25_FEC_RST_GPIO, 1, 0, }, /* PHY reset */ + { MX25_PAD_D11__GPIO_4_9, VMX25_FEC_CLK_GPIO, 1, 1, }, /* PHY CLK enable */ + { MX25_PAD_FEC_TX_CLK__GPIO_3_13, IMX_GPIO_NR(3, 13), 0, 0, }, /* ENET_CLK */ + { MX25_PAD_FEC_MDC__GPIO_3_5, IMX_GPIO_NR(3, 5), 1, 0, }, /* MDC */ + { MX25_PAD_FEC_MDIO__GPIO_3_6, IMX_GPIO_NR(3, 6), 1, 0, }, /* MDIO */ + { MX25_PAD_FEC_RDATA0__GPIO_3_10, IMX_GPIO_NR(3, 10), 1, 1, }, /* Mode0/RXD0 */ + { MX25_PAD_FEC_RDATA1__GPIO_3_11, IMX_GPIO_NR(3, 11), 1, 1, }, /* Mode1/RXD1 */ + { MX25_PAD_D12__GPIO_4_8, IMX_GPIO_NR(4, 8), 0, 0, }, /* RX_ER */ + { MX25_PAD_FEC_TX_EN__GPIO_3_9, IMX_GPIO_NR(3, 9), 1, 0, }, /* TX_EN */ + { MX25_PAD_FEC_TDATA0__GPIO_3_7, IMX_GPIO_NR(3, 7), 1, 0, }, /* TXD0 */ + { MX25_PAD_FEC_TDATA1__GPIO_3_8, IMX_GPIO_NR(3, 8), 1, 0, }, /* TXD1 */ + { MX25_PAD_FEC_RX_DV__GPIO_3_12, IMX_GPIO_NR(3, 12), 1, 1, }, /* Mode2/CRS_DV */ +}; + +static iomux_v3_cfg_t vmx25_fec_pads[] = { + MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, + MX25_PAD_FEC_MDC__FEC_MDC, + MX25_PAD_FEC_MDIO__FEC_MDIO, + MX25_PAD_FEC_RDATA0__FEC_RDATA0, + MX25_PAD_FEC_RDATA1__FEC_RDATA1, + MX25_PAD_FEC_TX_EN__FEC_TX_EN, + MX25_PAD_FEC_TDATA0__FEC_TDATA0, + MX25_PAD_FEC_TDATA1__FEC_TDATA1, + MX25_PAD_FEC_RX_DV__FEC_RX_DV, +}; + +static inline void vmx25_fec_activate(void) +{ + int i; + + /* Configure LAN8700 pads as GPIO and set up + * necessary strap options for PHY + */ + for (i = 0; i < ARRAY_SIZE(vmx25_fec_gpios); i++) { + struct vmx25_fec_gpio_setup *gs = &vmx25_fec_gpios[i]; + + if (gs->dir) { + gpio_direction_output(gs->gpio, gs->level); + } else { + gpio_direction_input(gs->gpio); + } + + mxc_iomux_v3_setup_pad(gs->pad); + } + + /* + *Turn on phy clk, leave in reset state + */ + gpio_set_value(VMX25_FEC_CLK_GPIO, 1); + + /* + * Wait some time to let the phy clock stabilise + */ + mdelay(1); + + /* + * Deassert reset, phy latches the rest of bootstrap pins + */ + gpio_set_value(VMX25_FEC_RST_GPIO, 1); + + /* LAN7800 has an internal Power On Reset (POR) signal (OR'ed with + * the external RESET signal) which is deactivated 21ms after + * power on and latches the strap options. + * Delay for 22ms to ensure, that the internal POR is inactive + * before reconfiguring the strap pins. + */ + mdelay(22); + + /* + * The phy is ready, now configure imx25 pads for fec operation + */ + mxc_iomux_v3_setup_multiple_pads(vmx25_fec_pads, + ARRAY_SIZE(vmx25_fec_pads)); +} +#else +#define vmx25_fec_activate() ((void)0) +#endif + +static u8 imx25_si_revision(void) +{ + int ret; + u8 rid; + + ret = imx_iim_read(0, 7, &rid, sizeof(rid)); + if (ret != sizeof(rid)) { + rid = 0; + } + + return rid; +} + +static u64 imx25_uid(void) +{ + int ret; + u64 uid; + + ret = imx_iim_read(0, 8, &uid, sizeof(uid)); + if (ret != sizeof(uid)) { + uid = 0; + } + + return uid; +} + +static int vmx25_module_init(void) +{ + if (!of_machine_is_compatible("voipac,imx25-vmx25")) { + return 0; + } + + barebox_set_hostname("vmx25"); + armlinux_set_architecture(MACH_TYPE_VMX25); + armlinux_set_serial(imx25_uid() & 0x7fffffffffffffffull); + armlinux_set_revision(0x25000|imx25_si_revision()); + + return 0; +} +fs_initcall(vmx25_module_init); + +static int vmx25_console_init(void) +{ + if (!of_machine_is_compatible("voipac,imx25-vmx25")) { + return 0; + } + + mxc_iomux_v3_setup_multiple_pads(vmx25_sys_pads, + ARRAY_SIZE(vmx25_sys_pads));; + + /* assert RESET_OUT_B */ + gpio_direction_output(VMX25_RESET_OUT_GPIO, 0); + + mdelay(10); + + /* SDHC 0 = baseboard, 1 = module */ + gpio_set_value(VMX25_SD1_SEL_GPIO, 0); + + vmx25_fec_activate(); + + /* deassert RESET_OUT_B */ + gpio_set_value(VMX25_RESET_OUT_GPIO, 1); + + return 0; +} +console_initcall(vmx25_console_init); + +/* LCD */ +#define VMX25_LCD_BCKLIGHT_GPIO IMX_GPIO_NR(1, 26) +#define VMX25_LCD_POWER_GPIO IMX_GPIO_NR(4, 3) + +static iomux_v3_cfg_t vmx25_lcd_pads[] = { + /* LCDC */ + MX25_PAD_LD0__LD0, + MX25_PAD_LD1__LD1, + MX25_PAD_LD2__LD2, + MX25_PAD_LD3__LD3, + MX25_PAD_LD4__LD4, + MX25_PAD_LD5__LD5, + MX25_PAD_LD6__LD6, + MX25_PAD_LD7__LD7, + MX25_PAD_LD8__LD8, + MX25_PAD_LD9__LD9, + MX25_PAD_LD10__LD10, + MX25_PAD_LD11__LD11, + MX25_PAD_LD12__LD12, + MX25_PAD_LD13__LD13, + MX25_PAD_LD14__LD14, + MX25_PAD_LD15__LD15, + MX25_PAD_GPIO_E__LD16, + MX25_PAD_GPIO_F__LD17, + MX25_PAD_LSCLK__LSCLK, + MX25_PAD_OE_ACD__OE_ACD, + MX25_PAD_VSYNC__VSYNC, + MX25_PAD_HSYNC__HSYNC, + // BACKLIGHT CONTROL + MX25_PAD_PWM__GPIO_1_26, + // PSAVE + MX25_PAD_CS1__GPIO_4_3, +}; + +static struct imx_fb_videomode imxfb_mode = { + .bpp = 16, + .mode = { + .name = "VGA", + .pixclock = 30076, + + .xres = 640, + .yres = 480, + + .hsync_len = 64, + .left_margin = 96, + .right_margin = 48, + + .vsync_len = 2, + .upper_margin = 33, + .lower_margin = 10, + }, + .pcr = PCR_TFT | PCR_COLOR | PCR_FLMPOL | PCR_LPPOL | PCR_SCLK_SEL, +}; + +static void imxfb_enable(int enable) +{ + gpio_direction_output(VMX25_LCD_POWER_GPIO, 1); + + if (enable) { + gpio_direction_output(VMX25_LCD_BCKLIGHT_GPIO, 0); + } else { + gpio_direction_output(VMX25_LCD_BCKLIGHT_GPIO, 1); + } +} + +static struct imx_fb_platform_data vmx25_fb_data = { + .mode = &imxfb_mode, + .num_modes = 1, + .dmacr = 0x80040060, + .enable = imxfb_enable, +}; + +static int vmx25_init_fb(void) +{ + if (!IS_ENABLED(CONFIG_DRIVER_VIDEO_IMX)) + return 0; + + if (!of_machine_is_compatible("voipac,imx25-vmx25")) + return 0; + + mxc_iomux_v3_setup_multiple_pads(vmx25_lcd_pads, + ARRAY_SIZE(vmx25_lcd_pads)); + + imxfb_enable(0); + + imx25_add_fb(&vmx25_fb_data); + + return 0; +} +device_initcall(vmx25_init_fb); diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/bin/update barebox-2014.03.0.work/arch/arm/boards/vmx25/env/bin/update --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/bin/update 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/bin/update 2014-07-28 16:05:38.675808088 +0200 @@ -0,0 +1,67 @@ +#!/bin/sh + +updatedir=vmx25 +barebox=$updatedir/barebox.img +zimage=$updatedir/zImage +rootfs=$updatedir/rootfs.bin + +. /env/config + +if [ x$1 = xbarebox ]; then + image=$barebox + part=/dev/nand0.barebox.bb +fi + +if [ x$1 = xkernel ]; then + image=$zimage + part=/dev/nand0.kernel.bb +fi + +if [ x$1 = xrootfs ]; then + image=$rootfs + part=/dev/nand0.rootfs +fi + +if [ -z "$part" -o -z "$image" ]; then + echo "update barebox|kernel|rootfs []" + exit 1 +fi + +if [ ! -e "$part" ]; then + echo "Partition $part does not exist" + exit 1 +fi + +if [ $# = 2 ]; then + image=$2 +fi + +if [ -f /env/network/eth0 ]; then + ifup eth0 +fi + +ping $eth0.serverip +if [ $? -ne 0 ] ; then + echo "Update aborted" + exit 1 +fi + +unprotect $part + +echo +echo "Erasing partition $part" +erase $part + +if [ x$1 = xrootfs ]; then + echo + echo "Attaching UBI to $part" + ubiattach $part + ubimkvol /dev/ubi0 rootfs 0 + + part=/dev/ubi0.rootfs +fi + +echo +echo "Flashing $image to $part" +echo +tftp $image $part diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/nand-dtb-ubi barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/nand-dtb-ubi --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/nand-dtb-ubi 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/nand-dtb-ubi 2014-07-28 16:10:46.085800992 +0200 @@ -0,0 +1,9 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "nand dtb (UBI)" + exit +fi + +global.bootm.image="/dev/nand0.kernel.bb" +global.linux.bootargs.dyn.root="root=ubi0:rootfs ubi.mtd=nand0.rootfs rootfstype=ubifs" diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/nand-legacy-ubi barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/nand-legacy-ubi --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/nand-legacy-ubi 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/nand-legacy-ubi 2014-07-28 12:38:10.239767649 +0200 @@ -0,0 +1,10 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "nand legacy (UBI)" + exit +fi + +oftree -f +global.bootm.image="/dev/nand0.kernel.bb" +global.linux.bootargs.dyn.root="root=ubi0:rootfs ubi.mtd=nand0.rootfs rootfstype=ubifs" diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/net-dtb barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/net-dtb --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/net-dtb 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/net-dtb 2014-07-28 16:16:59.200222339 +0200 @@ -0,0 +1,29 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "network dtb (tftp, nfs)" + exit +fi + +. /env/config + +#Settings +dtb=imx25-vmx25-${global.vmxmodel}.dtb +kernel=zImage-3.12.13_vmx25_dev + +dhcp +eth0.serverip=192.168.0.1 + +tftp vmx25/${kernel} +tftp vmx25/${dtb} + +global.bootm.image=${kernel} +if [ -e "${dtb}" ]; then + oftree -f + oftree -l "${dtb}" +fi + +nfsroot="${eth0.serverip}:/srv/nfs/rootfs-bb-1-22-vmx25,nolock" + +bootargs-ip +global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp" diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/net-legacy barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/net-legacy --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/boot/net-legacy 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/boot/net-legacy 2014-07-28 12:35:53.570916913 +0200 @@ -0,0 +1,21 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "network legacy (tftp, nfs)" + exit +fi + +#Settings +kernel=zImage-3.12.13_vmx25_dev + +dhcp +eth0.serverip=192.168.0.1 + +tftp vmx25/${kernel} +global.bootm.image=${kernel} + +oftree -f +nfsroot="${eth0.serverip}:/srv/nfs/rootfs-bb-1-22-vmx25,nolock" + +bootargs-ip +global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp" diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/config-board barebox-2014.03.0.work/arch/arm/boards/vmx25/env/config-board --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/config-board 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/config-board 2014-07-28 12:37:15.083425530 +0200 @@ -0,0 +1,13 @@ +#!/bin/sh + +# board defaults, do not change in running system. Change /env/config +# instead + +global vmxmodel +global vmxkernel + +global.vmxmodel=254 +global.vmxkernel=3.12 +global.hostname=vmx25 +global.linux.bootargs.base="console=ttymxc0,115200" +global.boot.default=nand-legacy-ubi diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/init/dtb barebox-2014.03.0.work/arch/arm/boards/vmx25/env/init/dtb --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/init/dtb 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/init/dtb 2014-07-28 16:00:17.993731000 +0200 @@ -0,0 +1,16 @@ +#!/bin/sh + +# Load correct dtb file + +if [ -e /env/config ]; then + /env/config +fi + +#Settings +dtb=imx53-vmx53-${global.vmxmodel}.dtb + +if [ -e /env/dtb/${global.vmxkernel}/${dtb} ]; then + oftree -f + oftree -l /env/dtb/${global.vmxkernel}/${dtb} + echo "DTB: ${dtb}" +fi diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/init/eth0-mac barebox-2014.03.0.work/arch/arm/boards/vmx25/env/init/eth0-mac --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/init/eth0-mac 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/init/eth0-mac 2014-04-24 08:16:35.336014702 +0200 @@ -0,0 +1,15 @@ +#!/bin/sh + +interface=eth0 + +. /env/network/${interface} + +if [ -z $ethaddr ]; then + while [ -z $ethaddr ]; do + readline "No MAC address set for eth0. Please enter the one found on your module: " ethaddr + done + echo -a /env/network/${interface} "ethaddr=$ethaddr" + saveenv +fi + +${interface}.ethaddr=$ethaddr diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/init/mtdparts-nand barebox-2014.03.0.work/arch/arm/boards/vmx25/env/init/mtdparts-nand --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/env/init/mtdparts-nand 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/env/init/mtdparts-nand 2014-07-28 16:06:31.376149600 +0200 @@ -0,0 +1,32 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + init-menu-add-entry "$0" "NAND partitions" + exit +fi + +mtdnames="barebox environment kernel rootfs" +mtdparts="512k(nand0.barebox),512k(nand0.environment),4M(nand0.kernel),-(nand0.rootfs)" + +for partition in ${mtdnames} +do + if [ -e /dev/nand0.${partition}.bb ]; then + nand -d /dev/nand0.${partition}.bb + fi + + if [ -e /dev/nand0.${partition} ]; then + delpart /dev/nand0.${partition} + fi +done + +addpart -n /dev/nand0 "${mtdparts}" + +for partition in ${mtdnames} +do + if [ ! -e /dev/nand0.${partition}.bb ]; then + nand -a /dev/nand0.${partition} + fi +done + +global linux.mtdparts.nand0 +global.linux.mtdparts.nand0="mxc_nand:${mtdparts}" diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/flash-header-vmx25.imxcfg barebox-2014.03.0.work/arch/arm/boards/vmx25/flash-header-vmx25.imxcfg --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/flash-header-vmx25.imxcfg 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/flash-header-vmx25.imxcfg 2014-04-05 02:24:52.935968500 +0200 @@ -0,0 +1,23 @@ +# +# currently unused in barebox, but useful to generate +# a imx-image to use with imx-usb-loader +# +soc imx25 +loadaddr 0x80000000 +dcdofs 0x400 +wm 32 0xb8001010 0x00000002 +wm 32 0xb8001004 0x00095728 +wm 32 0xb8001000 0x92216480 +wm 32 0x80000400 0x92216480 +wm 32 0xb8001000 0xa2216480 +wm 32 0xb8001000 0xb2216480 +wm 8 0x80000033 0x80 +wm 32 0xb8001000 0x82216480 + +wm 32 0xb800100c 0x00095728 +wm 32 0xb8001008 0x92216480 +wm 32 0x80000400 0x92216480 +wm 32 0xb8001008 0xa2216480 +wm 32 0xb8001008 0xb2216480 +wm 8 0x90000033 0x80 +wm 32 0xb8001008 0x82216480 diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/lowlevel.c barebox-2014.03.0.work/arch/arm/boards/vmx25/lowlevel.c --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/lowlevel.c 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/lowlevel.c 2014-05-20 20:58:57.289378366 +0200 @@ -0,0 +1,241 @@ +/* + * + * (c) 2011 Pengutronix, Sascha Hauer + * (c) 2014 Voipac + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static inline void setup_uart(void) +{ + void __iomem *uartbase = (void *)MX25_UART1_BASE_ADDR; + void __iomem *iomuxbase = (void *)MX25_IOMUXC_BASE_ADDR; + + writel(0x0, iomuxbase + 0x174); + + writel(0x00000000, uartbase + 0x80); + writel(0x00004027, uartbase + 0x84); + writel(0x00000704, uartbase + 0x88); + writel(0x00000a81, uartbase + 0x90); + writel(0x0000002b, uartbase + 0x9c); + writel(0x00013880, uartbase + 0xb0); + writel(0x0000047f, uartbase + 0xa4); + writel(0x0000a259, uartbase + 0xa8); + writel(0x00000001, uartbase + 0x80); + + putc_ll('>'); +} + +#define SDRAM_TEST_PATTERN1 0x55555555ul +#define SDRAM_TEST_PATTERN2 0xAAAAAAAAul + +static inline void __bare_init setup_sdram_disable( + void __iomem * esdctlreg, void __iomem * esdcfgreg) +{ + writel(0x0, esdcfgreg); /* config */ + writel(0x0, esdctlreg); /* control */ +} + +static inline void __bare_init setup_sdram_columns(uint32_t base, + void __iomem * esdctlreg) +{ + uint32_t esdctl; + uint32_t colcnt; + +/* 8cols: 0x80000000 = 0x80000200 = 0x80000400 = 0x80000600 */ +/* 9cols: 0x80000000 = 0x80000400 */ +/* 10cols: 0x80000000 */ + + writel(ESDCTL0_COL10, base | 0x000); /* [80000000] = 10 col */ + writel(ESDCTL0_COL9, base | 0x400); /* [80000400] = 9 col */ + writel(ESDCTL0_COL8, base | 0x600); /* [80000600] = 8 col */ + colcnt = readl(base); + + esdctl = readl(esdctlreg); /* set cols */ + esdctl &= ~(ESDCTL0_COL_MASK); + esdctl |= colcnt; + + writel(esdctl, esdctlreg); +} + +static inline void __bare_init setup_sdram_rows(uint32_t base, + void __iomem * esdctlreg) +{ + uint32_t esdctl; + uint32_t rowcnt; + +/* 13rows (32M16): 0x80000000 = 0x84000000 */ +/* 13rows (16M16): 0x80000000 = 0x82000000 = 0x84000000 */ +/* 12rows (8M16): 0x80000000 = 0x80400000 */ +/* 12rows (4M16): 0x80000000 = 0x80100000 = 0x80200000 = 0x80300000 = 0x80400000 */ + + writel(ESDCTL0_ROW13, base | 0x000000); /* [80000000] = 13 row */ + writel(ESDCTL0_ROW12, base | 0x400000); /* [80400000] = 12 row */ + rowcnt = readl(base); + + esdctl = readl(esdctlreg); /* set rows */ + esdctl &= ~(ESDCTL0_ROW_MASK); + esdctl |= rowcnt; + + writel(esdctl, esdctlreg); +} + +static void __bare_init setup_sdram(uint32_t base, uint32_t esdctl, + uint32_t esdcfg) +{ + void __iomem * esdctlreg = (void *) (MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL0); + void __iomem * esdcfgreg = (void *) (MX25_ESDCTL_BASE_ADDR + IMX_ESDCFG0); + + if (base == MX25_CSD1_BASE_ADDR) { + esdctlreg += 8; + esdcfgreg += 8; + } + + esdctl |= ESDCTL0_SDE; + + writel(esdcfg, esdcfgreg); + writel(esdctl | ESDCTL0_SMODE_PRECHARGE, esdctlreg); + writel(0, base + 1024); + writel(esdctl | ESDCTL0_SMODE_AUTO_REFRESH, esdctlreg); + readb(base); + readb(base); + writel(esdctl | ESDCTL0_SMODE_LOAD_MODE, esdctlreg); + writeb(0, base + 0x33); + writel(esdctl, esdctlreg); + + writel(SDRAM_TEST_PATTERN1, base+0); + writel(SDRAM_TEST_PATTERN2, base+4); + if ((SDRAM_TEST_PATTERN1 == readl(base+0)) && + (SDRAM_TEST_PATTERN2 == readl(base+4))) { + setup_sdram_columns(base, esdctlreg); + setup_sdram_rows(base, esdctlreg); + } else { + setup_sdram_disable(esdctlreg, esdcfgreg); + } +} + +static void __bare_init vmx25_common_init(uint32_t fdt) +{ + uint32_t r; + + arm_cpu_lowlevel_init(); + + /* AIPS setup - Only setup MPROTx registers. The PACR default values are good. + * Set all MPROTx to be non-bufferable, trusted for R/W, + * not forced to user-mode. + */ + writel(0x77777777, 0x43f00000); + writel(0x77777777, 0x43f00004); + writel(0x77777777, 0x53f00000); + writel(0x77777777, 0x53f00004); + + /* MAX (Multi-Layer AHB Crossbar Switch) setup + * MPR - priority for MX25 is (SDHC2/SDMA)>USBOTG>RTIC>IAHB>DAHB + */ + writel(0x00043210, 0x43f04000); + writel(0x00043210, 0x43f04100); + writel(0x00043210, 0x43f04200); + writel(0x00043210, 0x43f04300); + writel(0x00043210, 0x43f04400); + /* SGPCR - always park on last master */ + writel(0x10, 0x43f04010); + writel(0x10, 0x43f04110); + writel(0x10, 0x43f04210); + writel(0x10, 0x43f04310); + writel(0x10, 0x43f04410); + /* MGPCR - restore default values */ + writel(0x0, 0x43f04800); + writel(0x0, 0x43f04900); + writel(0x0, 0x43f04a00); + writel(0x0, 0x43f04b00); + writel(0x0, 0x43f04c00); + + /* Configure M3IF registers + * M3IF Control Register (M3IFCTL) for MX25 + * MRRP[0] = LCDC on priority list (1 << 0) = 0x00000001 + * MRRP[1] = MAX1 not on priority list (0 << 1) = 0x00000000 + * MRRP[2] = MAX0 not on priority list (0 << 2) = 0x00000000 + * MRRP[3] = USB HOST not on priority list (0 << 3) = 0x00000000 + * MRRP[4] = SDMA not on priority list (0 << 4) = 0x00000000 + * MRRP[5] = SD/ATA/FEC not on priority list (0 << 5) = 0x00000000 + * MRRP[6] = SCMFBC not on priority list (0 << 6) = 0x00000000 + * MRRP[7] = CSI not on priority list (0 << 7) = 0x00000000 + * ---------- + * 0x00000001 + */ + writel(0x1, 0xb8003000); + + /* configure ARM clk */ + writel(0x20034000, MX25_CCM_BASE_ADDR + MX25_CCM_CCTL); + + /* enable all the clocks */ + writel(0x1fffffff, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR0); + writel(0xffffffff, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR1); + writel(0x000fdfff, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR2); + + setup_uart(); + + /* Skip SDRAM initialization if we run from RAM */ + r = get_pc(); + if (r > MX25_CSD0_BASE_ADDR && r < MX25_CS0_BASE_ADDR) + goto out; + + /* set to 3.3v SDRAM */ + writel(0x800, MX25_IOMUXC_BASE_ADDR + 0x454); + + writel(ESDMISC_RST, MX25_ESDCTL_BASE_ADDR + IMX_ESDMISC); + + while (!(readl(MX25_ESDCTL_BASE_ADDR + IMX_ESDMISC) & (1 << 31))); + +#define ESDCTLVAL (ESDCTL0_ROW13 | ESDCTL0_COL10 | ESDCTL0_DSIZ_15_0 | \ + ESDCTL0_REF4 | ESDCTL0_PWDT_PRECHARGE_PWDN | ESDCTL0_BL) +#define ESDCFGVAL (ESDCFGx_tRP_3 | ESDCFGx_tMRD_2 | ESDCFGx_tRAS_6 | \ + ESDCFGx_tRRD_2 | ESDCFGx_tCAS_3 | ESDCFGx_tRCD_3 | \ + ESDCFGx_tRC_9) + + setup_sdram(MX25_CSD0_BASE_ADDR, ESDCTLVAL, ESDCFGVAL); + setup_sdram(MX25_CSD1_BASE_ADDR, ESDCTLVAL, ESDCFGVAL); + + imx25_barebox_boot_nand_external(fdt); + +out: + imx25_barebox_entry(fdt); +} + +extern char __dtb_imx25_vmx25_start[]; + +ENTRY_FUNCTION(start_imx25_vmx25, r0, r1, r2) +{ + uint32_t fdt; + + arm_setup_stack(MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE - 8); + + fdt = (uint32_t)__dtb_imx25_vmx25_start - get_runtime_offset(); + + vmx25_common_init(fdt); +} diff -urN barebox-2014.03.0.orig/arch/arm/boards/vmx25/Makefile barebox-2014.03.0.work/arch/arm/boards/vmx25/Makefile --- barebox-2014.03.0.orig/arch/arm/boards/vmx25/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/boards/vmx25/Makefile 2014-04-05 10:31:28.971823692 +0200 @@ -0,0 +1,21 @@ +# +# (C) Copyright 2011 Sascha Hauer +# (C) Copyright 2014 Voipac +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# + +lwl-y += lowlevel.o +obj-y += board.o diff -urN barebox-2014.03.0.orig/arch/arm/configs/vmx25_defconfig barebox-2014.03.0.work/arch/arm/configs/vmx25_defconfig --- barebox-2014.03.0.orig/arch/arm/configs/vmx25_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/configs/vmx25_defconfig 2014-07-04 23:04:01.875516047 +0200 @@ -0,0 +1,579 @@ +# +# Automatically generated file; DO NOT EDIT. +# Barebox/arm 2014.03.0 Configuration +# +CONFIG_ARM=y +CONFIG_ARM_LINUX=y + +# +# System Type +# +# CONFIG_BUILTIN_DTB is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_HIGHBANK is not set +CONFIG_ARCH_IMX=y +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXS is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_SOCFPGA is not set +# CONFIG_ARCH_S3C24xx is not set +# CONFIG_ARCH_S5PCxx is not set +# CONFIG_ARCH_S3C64xx is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_ZYNQ is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y + +# +# processor features +# +# CONFIG_BOOT_ENDIANNESS_SWITCH is not set +CONFIG_ARCH_TEXT_BASE=0x81f00000 +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0xffffffff +CONFIG_ARCH_IMX_IMXIMAGE=y +CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND=y +CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND=y + +# +# Freescale i.MX System-on-Chip +# +CONFIG_ARCH_IMX25=y +CONFIG_IMX_MULTI_BOARDS=y +# CONFIG_MACH_TX25 is not set +CONFIG_MACH_VMX25=y +# CONFIG_MACH_EFIKA_MX_SMARTBOOK is not set +# CONFIG_MACH_FREESCALE_MX51_PDK is not set +# CONFIG_MACH_FREESCALE_MX53_LOCO is not set +# CONFIG_MACH_TQMA53 is not set +# CONFIG_MACH_FREESCALE_MX53_VMX53 is not set +# CONFIG_MACH_PHYTEC_PFLA02 is not set +# CONFIG_MACH_DFI_FS700_M60 is not set +# CONFIG_MACH_REALQ7 is not set +# CONFIG_MACH_GK802 is not set +# CONFIG_MACH_TQMA6X is not set +# CONFIG_MACH_SABRELITE is not set +# CONFIG_MACH_NITROGEN6X is not set +# CONFIG_MACH_SOLIDRUN_HUMMINGBOARD is not set + +# +# Board specific settings +# + +# +# i.MX specific settings +# +# CONFIG_ARCH_IMX_USBLOADER is not set +CONFIG_IMX_IIM=y +# CONFIG_IMX_IIM_FUSE_BLOW is not set +CONFIG_AEABI=y +# CONFIG_ARM_BOARD_APPEND_ATAG is not set + +# +# Arm specific settings +# +CONFIG_CMD_ARM_CPUINFO=y +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_ARM_EXCEPTIONS=y +CONFIG_ARM_UNWIND=y +CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG" +CONFIG_GREGORIAN_CALENDER=y +CONFIG_HAS_KALLSYMS=y +CONFIG_HAS_MODULES=y +CONFIG_CMD_MEMORY=y +CONFIG_ENV_HANDLING=y +CONFIG_GENERIC_GPIO=y +CONFIG_BOOTM=y +CONFIG_BLOCK=y +CONFIG_BLOCK_WRITE=y +CONFIG_FILETYPE=y +CONFIG_BINFMT=y +CONFIG_UIMAGE=y +CONFIG_GLOBALVAR=y +CONFIG_STDDEV=y +CONFIG_BAREBOX_UPDATE=y + +# +# General Settings +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BANNER=y +CONFIG_MEMINFO=y +CONFIG_ENVIRONMENT_VARIABLES=y + +# +# memory layout +# +CONFIG_HAVE_PBL_IMAGE=y +CONFIG_HAVE_PBL_MULTI_IMAGES=y +CONFIG_HAVE_IMAGE_COMPRESSION=y +CONFIG_PBL_IMAGE=y +CONFIG_PBL_MULTI_IMAGES=y +CONFIG_PBL_RELOCATABLE=y +CONFIG_IMAGE_COMPRESSION=y +# CONFIG_IMAGE_COMPRESSION_LZ4 is not set +CONFIG_IMAGE_COMPRESSION_LZO=y +# CONFIG_IMAGE_COMPRESSION_GZIP is not set +# CONFIG_IMAGE_COMPRESSION_NONE is not set +CONFIG_MMU=y +CONFIG_MMU_EARLY=y +CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y +CONFIG_TEXT_BASE=0x81f00000 +CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0xffffffff +CONFIG_STACK_SIZE=0x8000 +CONFIG_MALLOC_SIZE=0x1000000 +# CONFIG_BROKEN is not set +# CONFIG_EXPERIMENTAL is not set +# CONFIG_MALLOC_DLMALLOC is not set +CONFIG_MALLOC_TLSF=y +CONFIG_KALLSYMS=y +# CONFIG_RELOCATABLE is not set +# CONFIG_PANIC_HANG is not set +CONFIG_PROMPT="barebox:" +CONFIG_BAUDRATE=115200 +CONFIG_LONGHELP=y +CONFIG_CBSIZE=1024 +CONFIG_SHELL_HUSH=y +# CONFIG_SHELL_SIMPLE is not set +# CONFIG_SHELL_NONE is not set +CONFIG_GLOB=y +CONFIG_GLOB_SORT=y +CONFIG_PROMPT_HUSH_PS2="> " +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_HUSH_GETOPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +# CONFIG_MENU is not set +# CONFIG_PASSWORD is not set +CONFIG_DYNAMIC_CRC_TABLE=y +CONFIG_ERRNO_MESSAGES=y +CONFIG_TIMESTAMP=y +# CONFIG_BLSPEC is not set +# CONFIG_KERNEL_INSTALL_TARGET is not set +CONFIG_CONSOLE_FULL=y +# CONFIG_CONSOLE_SIMPLE is not set +# CONFIG_CONSOLE_NONE is not set +# CONFIG_CONSOLE_ACTIVATE_FIRST is not set +# CONFIG_CONSOLE_ACTIVATE_ALL is not set +CONFIG_CONSOLE_ACTIVATE_NONE=y +CONFIG_PARTITION=y +CONFIG_PARTITION_DISK=y +CONFIG_PARTITION_DISK_DOS=y +# CONFIG_PARTITION_DISK_EFI is not set +CONFIG_DEFAULT_ENVIRONMENT=y +CONFIG_HAVE_DEFAULT_ENVIRONMENT_NEW=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/vmx25/env" +# CONFIG_BAREBOXENV_TARGET is not set +# CONFIG_BAREBOXCRC32_TARGET is not set +CONFIG_POLLER=y +CONFIG_RESET_SOURCE=y + +# +# Debugging +# +CONFIG_COMPILE_LOGLEVEL=6 +CONFIG_DEFAULT_LOGLEVEL=7 +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_LL is not set +CONFIG_DEBUG_IMX_UART_PORT=1 +# CONFIG_DEBUG_INITCALLS is not set +CONFIG_HAS_DEBUG_LL=y +CONFIG_COMMAND_SUPPORT=y +# CONFIG_HAS_POWEROFF is not set + +# +# commands +# + +# +# scripting +# +CONFIG_CMD_EDIT=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_MSLEEP=y +CONFIG_CMD_SAVEENV=y +# CONFIG_CMD_LOADENV is not set +CONFIG_CMD_EXPORT=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_READLINE=y +# CONFIG_CMD_LET is not set +CONFIG_CMD_TRUE=y +CONFIG_CMD_FALSE=y +# CONFIG_CMD_LOGIN is not set +# CONFIG_CMD_PASSWD is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_GLOBAL=y + +# +# file commands +# +CONFIG_CMD_LS=y +CONFIG_CMD_RM=y +CONFIG_CMD_CAT=y +CONFIG_CMD_MKDIR=y +CONFIG_CMD_RMDIR=y +CONFIG_CMD_CP=y +CONFIG_CMD_PWD=y +CONFIG_CMD_CD=y +CONFIG_CMD_MOUNT=y +CONFIG_CMD_UMOUNT=y +CONFIG_CMD_NAND=y +CONFIG_CMD_AUTOMOUNT=y +CONFIG_CMD_BASENAME=y +CONFIG_CMD_DIRNAME=y +CONFIG_CMD_LN=y +CONFIG_CMD_READLINK=y +CONFIG_CMD_TFTP=y +CONFIG_CMD_FILETYPE=y + +# +# console +# +CONFIG_CMD_CLEAR=y +CONFIG_CMD_ECHO=y +CONFIG_CMD_ECHO_E=y + +# +# memory +# +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADY is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_IOMEM=y +CONFIG_CMD_MD=y +CONFIG_CMD_MW=y +# CONFIG_CMD_MM is not set +CONFIG_CMD_MEMCMP=y +CONFIG_CMD_MEMCPY=y +CONFIG_CMD_MEMSET=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_DIGEST=y +CONFIG_CMD_MD5SUM=y +# CONFIG_CMD_SHA1SUM is not set +# CONFIG_CMD_SHA256SUM is not set +# CONFIG_CMD_SHA224SUM is not set + +# +# flash +# +CONFIG_CMD_FLASH=y +CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFORMAT is not set + +# +# booting +# +CONFIG_CMD_BOOTM=y +CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_VERBOSE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +# CONFIG_CMD_BOOTM_AIMAGE is not set +CONFIG_CMD_UIMAGE=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_BOOTU=y +CONFIG_FLEXIBLE_BOOTARGS=y +CONFIG_CMD_BOOT=y +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_NODE=y + +# +# testing +# +# CONFIG_CMD_NANDTEST is not set +# CONFIG_CMD_MEMTEST is not set + +# +# video command +# +CONFIG_CMD_SPLASH=y +CONFIG_CMD_BAREBOX_UPDATE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_TEST=y +CONFIG_CMD_VERSION=y +CONFIG_CMD_HELP=y +CONFIG_CMD_MAGICVAR=y +CONFIG_CMD_MAGICVAR_HELP=y +CONFIG_CMD_DEVINFO=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_I2C=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y +CONFIG_CMD_USB=y +CONFIG_CMD_MIITOOL=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DETECT=y +CONFIG_CMD_WD=y +CONFIG_CMD_WD_DEFAULT_TIMOUT=0 +CONFIG_NET=y +CONFIG_NET_DHCP=y +# CONFIG_NET_NFS is not set +CONFIG_NET_PING=y +CONFIG_NET_NETCONSOLE=y +# CONFIG_NET_RESOLV is not set + +# +# Drivers +# +CONFIG_OFTREE=y +CONFIG_OFTREE_MEM_GENERIC=y +CONFIG_DTC=y +CONFIG_OFDEVICE=y +CONFIG_OF_NET=y +CONFIG_OF_GPIO=y +CONFIG_OF_BAREBOX_DRIVERS=y + +# +# serial drivers +# +# CONFIG_DRIVER_SERIAL_ARM_DCC is not set +CONFIG_DRIVER_SERIAL_IMX=y +# CONFIG_DRIVER_SERIAL_NS16550 is not set +# CONFIG_DRIVER_SERIAL_CADENCE is not set +CONFIG_ARCH_HAS_FEC_IMX=y +CONFIG_PHYLIB=y + +# +# Network drivers +# + +# +# phylib +# + +# +# MII PHY device drivers +# +# CONFIG_AT803X_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_DRIVER_NET_CALXEDA_XGMAC is not set +# CONFIG_DRIVER_NET_SMC911X is not set +# CONFIG_DRIVER_NET_SMC91111 is not set +CONFIG_DRIVER_NET_FEC_IMX=y +# CONFIG_DRIVER_NET_KS8851_MLL is not set +# CONFIG_DRIVER_NET_DESIGNWARE is not set +# CONFIG_DRIVER_NET_ETHOC is not set +# CONFIG_NET_USB is not set + +# +# SPI drivers +# +# CONFIG_SPI is not set +CONFIG_I2C=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_IMX=y +CONFIG_MTD=y +CONFIG_MTD_WRITE=y +CONFIG_MTD_OOB_DEVICE=y +# CONFIG_MTD_RAW_DEVICE is not set + +# +# Self contained MTD devices +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_DRIVER_CFI is not set +CONFIG_NAND=y +CONFIG_NAND_ECC_SOFT=y +# CONFIG_NAND_ECC_BCH is not set +CONFIG_NAND_ECC_HW=y +# CONFIG_NAND_ECC_HW_OOB_FIRST is not set +CONFIG_NAND_ECC_HW_SYNDROME=y +CONFIG_NAND_ECC_HW_NONE=y +CONFIG_NAND_INFO=y +CONFIG_NAND_READ_OOB=y +CONFIG_NAND_BBT=y +# CONFIG_NAND_ALLOW_ERASE_BAD is not set +CONFIG_NAND_IMX=y +# CONFIG_NAND_IMX_BBM is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +CONFIG_DISK=y +CONFIG_DISK_WRITE=y + +# +# drive types +# +# CONFIG_DISK_ATA is not set +# CONFIG_DISK_AHCI is not set + +# +# interface types +# +# CONFIG_DISK_INTF_PLATFORM_IDE is not set +CONFIG_USB=y +CONFIG_USB_IMX_CHIPIDEA=y +CONFIG_USB_EHCI=y +# CONFIG_USB_ULPI is not set +CONFIG_USB_STORAGE=y +CONFIG_USB_HAVE_GADGET_DRIVER=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_DRIVER_ARC=y + +# +# USB Gadget drivers +# +CONFIG_USB_GADGET_DFU=y +CONFIG_VIDEO=y +CONFIG_DRIVER_VIDEO_IMX=y +CONFIG_IMXFB_DRIVER_VIDEO_IMX_OVERLAY=y +# CONFIG_DRIVER_VIDEO_SIMPLEFB is not set +CONFIG_MCI=y + +# +# --- Feature list --- +# +# CONFIG_MCI_STARTUP is not set +CONFIG_MCI_INFO=y +CONFIG_MCI_WRITE=y +# CONFIG_MCI_MMC_BOOT_PARTITIONS is not set + +# +# --- MCI host drivers --- +# +# CONFIG_MCI_DW is not set +CONFIG_MCI_IMX_ESDHC=y +# CONFIG_MCI_IMX_ESDHC_PIO is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_COMMON_CLK=y + +# +# MFD +# +# CONFIG_MFD_LP3972 is not set +# CONFIG_MFD_MC13XXX is not set +# CONFIG_MFD_MC34704 is not set +# CONFIG_MFD_MC9SDZ60 is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_SYSCON is not set +# CONFIG_MFD_TWL4030 is not set +# CONFIG_MFD_TWL6030 is not set + +# +# Misc devices +# +# CONFIG_JTAG is not set +# CONFIG_SRAM is not set +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_GPIO_OF=y +# CONFIG_LED_GPIO_RGB is not set +# CONFIG_LED_GPIO_BICOLOR is not set +CONFIG_LED_TRIGGERS=y + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y + +# +# Input device support +# +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_IMX_KEYPAD is not set +# CONFIG_KEYBOARD_QT1070 is not set +CONFIG_WATCHDOG_IMX_RESET_SOURCE=y +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_IMX=y +# CONFIG_PWM is not set + +# +# DMA support +# +CONFIG_GPIOLIB=y + +# +# GPIO +# +# CONFIG_GPIO_GENERIC_PLATFORM is not set +CONFIG_GPIO_IMX=y +# CONFIG_GPIO_OMAP is not set +# CONFIG_GPIO_DESIGNWARE is not set +# CONFIG_W1 is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX_IOMUX_V3=y +# CONFIG_PINCTRL_SINGLE is not set + +# +# Bus devices +# +# CONFIG_IMX_WEIM is not set + +# +# Filesystem support +# +CONFIG_FS=y +CONFIG_FS_AUTOMOUNT=y +# CONFIG_FS_CRAMFS is not set +# CONFIG_FS_EXT4 is not set +CONFIG_FS_RAMFS=y +CONFIG_FS_DEVFS=y +CONFIG_FS_TFTP=y +CONFIG_FS_NFS=y +CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y +# CONFIG_FS_UBIFS is not set +# CONFIG_FS_BPKFS is not set +# CONFIG_FS_UIMAGEFS is not set +CONFIG_PARTITION_NEED_MTD=y + +# +# Library routines +# +CONFIG_PARAMETER=y +CONFIG_UNCOMPRESS=y +CONFIG_ZLIB=y +# CONFIG_BZLIB is not set +# CONFIG_LZ4_DECOMPRESS is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_PROCESS_ESCAPE_SEQUENCE=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_QSORT=y + +# +# Library gui routines +# +CONFIG_IMAGE_RENDERER=y +# CONFIG_BMP is not set +# CONFIG_PNG is not set +CONFIG_CRC32=y +CONFIG_DIGEST=y +CONFIG_MD5=y +# CONFIG_SHA1 is not set +# CONFIG_SHA224 is not set +# CONFIG_SHA256 is not set diff -urN barebox-2014.03.0.orig/arch/arm/dts/imx25-vmx25.dts barebox-2014.03.0.work/arch/arm/dts/imx25-vmx25.dts --- barebox-2014.03.0.orig/arch/arm/dts/imx25-vmx25.dts 1970-01-01 01:00:00.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/dts/imx25-vmx25.dts 2014-07-28 16:18:44.356905223 +0200 @@ -0,0 +1,278 @@ +/* + * Copyright 2012 Sascha Hauer, Pengutronix + * Copyright 2014 Voipac + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx25.dtsi" + +/ { + model = "Voipac VMX25"; + compatible = "voipac,imx25-vmx25", "fsl,imx25"; + + chosen { + linux,stdout-path = &uart1; + + environment@0 { + compatible = "barebox,environment"; + device-path = &nfc, "partname:environment"; + }; + }; + + regulators { + compatible = "simple-bus"; + + reg_3v3: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_qvdd: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "qvdd"; + regulator-min-microvolt = <1450000>; + regulator-max-microvolt = <1450000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_fec_phy: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "fec-phy"; + regulator-min-microvolt = <1450000>; + regulator-max-microvolt = <1450000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator@3 { + compatible = "regulator-fixed"; + regulator-name = "usb-otg-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 0 0>; + }; + + reg_usb_host_vbus: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "usb-host-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 11 0>; + }; + }; + +/* + * memory { + * reg = <0x80000000 0x02000000 0x90000000 0x02000000>; + * }; + */ + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led>; + + red { + label = "led-red"; + gpios = <&gpio2 4 0>; + linux,default-trigger = "heartbeat"; + }; + + orange { + label = "led-orange"; + gpios = <&gpio2 5 0>; + linux,default-trigger = "panic"; + }; + }; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 + MX25_PAD_UART1_RXD__UART1_RXD 0x80000000 + MX25_PAD_UART1_CTS__UART1_CTS 0x80000000 + MX25_PAD_UART1_RTS__UART1_RTS 0x80000000 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX25_PAD_UART2_TXD__UART2_TXD 0x80000000 + MX25_PAD_UART2_RXD__UART2_RXD 0x80000000 + MX25_PAD_UART2_CTS__UART2_CTS 0x80000000 + MX25_PAD_UART2_RTS__UART2_RTS 0x80000000 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX25_PAD_D13__GPIO_4_7 0xD0 /* FEC reset */ + MX25_PAD_D11__GPIO_4_9 0xD0 /* FEC PHY power on pin */ + MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX25_PAD_FEC_MDIO__FEC_MDIO 0x80000000 + MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 + MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 + MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 + MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 + MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 + MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 + >; + }; + + pinctrl_nfc: nfcgrp { + fsl,pins = < + MX25_PAD_NF_CE0__NF_CE0 0x80000000 + MX25_PAD_NFWE_B__NFWE_B 0x80000000 + MX25_PAD_NFRE_B__NFRE_B 0x80000000 + MX25_PAD_NFALE__NFALE 0x80000000 + MX25_PAD_NFCLE__NFCLE 0x80000000 + MX25_PAD_NFWP_B__NFWP_B 0x80000000 + MX25_PAD_NFRB__NFRB 0x80000000 + MX25_PAD_D7__D7 0x80000000 + MX25_PAD_D6__D6 0x80000000 + MX25_PAD_D5__D5 0x80000000 + MX25_PAD_D4__D4 0x80000000 + MX25_PAD_D3__D3 0x80000000 + MX25_PAD_D2__D2 0x80000000 + MX25_PAD_D1__D1 0x80000000 + MX25_PAD_D0__D0 0x80000000 + >; + }; + + pinctrl_led: ledgrp { + fsl,pins = < + MX25_PAD_A18__GPIO_2_4 0xC0 + MX25_PAD_A19__GPIO_2_5 0xC0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000 + MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000 + >; + }; + + pinctrl_usb_otg: usbotggrp { + fsl,pins = < +// MX25_PAD_GPIO_A__USBOTG_PWR 0x80000000 +// MX25_PAD_GPIO_B__USBOTG_OC 0x80000000 + MX25_PAD_GPIO_A__GPIO_A 0xD0 + MX25_PAD_GPIO_B__GPIO_B 0XD0 + >; + }; + + pinctrl_usb_host: usbhostgrp { + fsl,pins = < +// MX25_PAD_D9__USBH2_PWR 0x80000000 +// MX25_PAD_D8__USBH2_OC 0x80000000 + MX25_PAD_D9__GPIO_4_11 0xD0 + MX25_PAD_D8__GPIO_4_12 0xD0 + >; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; +// phy-reset-gpios = <&gpio4 7 0>; + phy-mode = "rmii"; +// phy-supply = <®_fec_phy>; + status = "okay"; +}; + +&iim { + barebox,provide-mac-address = <&fec 0 26>; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nfc>; + #address-cells = <1>; + #size-cells = <1>; + nand-on-flash-bbt; + nand-ecc-mode = "hw"; + nand-bus-width = <8>; + status = "okay"; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "environment"; + reg = <0x80000 0x80000>; + }; + + partition@2 { + label = "kernel"; + reg = <0x100000 0x400000>; + }; + + partition@3 { + label = "rootfs"; + reg = <0x500000 0x7b00000>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + at24@56 { + compatible = "at,24c64"; + pagesize = <32>; + reg = <0x56>; + }; +}; + +&usbotg { + phy_type = "utmi"; + dr_mode = "peripheral"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg>; + vbus-supply = <®_usb_otg_vbus>; +// pwr-pins-enabled; +// pwr-pin-active-high; +// oc-pin-active-low; + status = "okay"; +}; + +&usbhost1 { + phy_type = "serial"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_host>; + vbus-supply = <®_usb_host_vbus>; +// pwr-pins-enabled; +// pwr-pin-active-high; +// oc-pin-active-low; + status = "okay"; +}; diff -urN barebox-2014.03.0.orig/arch/arm/dts/Makefile barebox-2014.03.0.work/arch/arm/dts/Makefile --- barebox-2014.03.0.orig/arch/arm/dts/Makefile 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/dts/Makefile 2014-03-22 13:40:29.110723759 +0100 @@ -2,7 +2,8 @@ am335x-bone.dtb \ am335x-boneblack.dtb \ am335x-phytec-phycore.dtb -dtb-$(CONFIG_ARCH_IMX25) += imx25-karo-tx25.dtb +dtb-$(CONFIG_ARCH_IMX25) += imx25-karo-tx25.dtb \ + imx25-vmx25.dtb dtb-$(CONFIG_ARCH_IMX27) += imx27-phytec-phycard-s-rdk.dtb \ imx27-phytec-phycard-s-som.dtb dtb-$(CONFIG_ARCH_IMX51) += imx51-babbage.dtb \ @@ -50,6 +51,7 @@ pbl-$(CONFIG_MACH_TQMA53) += imx53-mba53.dtb.o pbl-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o pbl-$(CONFIG_MACH_TX25) += imx25-karo-tx25.dtb.o +pbl-$(CONFIG_MACH_VMX25) += imx25-vmx25.dtb.o pbl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o pbl-$(CONFIG_MACH_SOLIDRUN_HUMMINGBOARD) += imx6dl-hummingboard.dtb.o diff -urN barebox-2014.03.0.orig/arch/arm/mach-imx/clk-imx25.c barebox-2014.03.0.work/arch/arm/mach-imx/clk-imx25.c --- barebox-2014.03.0.orig/arch/arm/mach-imx/clk-imx25.c 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/mach-imx/clk-imx25.c 2014-04-13 18:58:47.480118621 +0200 @@ -55,7 +55,7 @@ per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel, per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5, per6, per7, per8, per9, per10, per11, per12, per13, per14, per15, - lcdc_per_gate, clk_max + lcdc_per_gate, lcdc_ahb_gate, lcdc_ipg_gate, clk_max }; static struct clk *clks[clk_max]; @@ -133,6 +133,8 @@ clks[per14] = imx_clk_divider("per14", "per14_sel", base + CCM_PCDR3, 16, 6); clks[per15] = imx_clk_divider("per15", "per15_sel", base + CCM_PCDR3, 24, 6); clks[lcdc_per_gate] = imx_clk_gate("lcdc_per_gate", "per7", base + CCM_CGCR0, 7); + clks[lcdc_ahb_gate] = imx_clk_gate("lcdc_ahb_gate", "ahb", base + CCM_CGCR0, 24); + clks[lcdc_ipg_gate] = imx_clk_gate("lcdc_ipg_gate", "ipg", base + CCM_CGCR1, 29); clkdev_add_physbase(clks[per15], MX25_UART1_BASE_ADDR, NULL); clkdev_add_physbase(clks[per15], MX25_UART2_BASE_ADDR, NULL); @@ -153,8 +155,8 @@ clkdev_add_physbase(clks[per3], MX25_ESDHC1_BASE_ADDR, NULL); clkdev_add_physbase(clks[per4], MX25_ESDHC2_BASE_ADDR, NULL); clkdev_add_physbase(clks[lcdc_per_gate], MX25_LCDC_BASE_ADDR, NULL); - clkdev_add_physbase(clks[dummy], MX25_LCDC_BASE_ADDR, "ipg"); - clkdev_add_physbase(clks[dummy], MX25_LCDC_BASE_ADDR, "ahb"); + clkdev_add_physbase(clks[lcdc_ahb_gate], MX25_LCDC_BASE_ADDR, "ahb"); + clkdev_add_physbase(clks[lcdc_ipg_gate], MX25_LCDC_BASE_ADDR, "ipg"); return 0; } diff -urN barebox-2014.03.0.orig/arch/arm/mach-imx/Kconfig barebox-2014.03.0.work/arch/arm/mach-imx/Kconfig --- barebox-2014.03.0.orig/arch/arm/mach-imx/Kconfig 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/arch/arm/mach-imx/Kconfig 2014-03-22 21:56:45.199320871 +0100 @@ -11,6 +11,7 @@ default 0x83f00000 if MACH_FREESCALE_MX25_3STACK && FREESCALE_MX25_3STACK_SDRAM_64MB_DDR2 default 0x87f00000 if MACH_FREESCALE_MX25_3STACK && FREESCALE_MX25_3STACK_SDRAM_128MB_MDDR default 0x87f00000 if MACH_FREESCALE_MX35_3STACK + default 0x81f00000 if MACH_VMX25 default 0xa7f00000 if MACH_PCA100 default 0xa0000000 if MACH_PCM038 default 0x87f00000 if MACH_PCM037 @@ -174,6 +175,14 @@ help Say Y here if you are using the Ka-Ro tx25 board +config MACH_VMX25 + bool "Voipac VMX25" + select ARCH_IMX25 + select ARCH_IMX_EXTERNAL_BOOT_NAND + help + Say Y here if you are using the Voipac Technologies VMX25 module + equipped with a Freescale i.MX25 Processor + config MACH_EFIKA_MX_SMARTBOOK bool "Efika MX smartbook" select ARCH_IMX51 diff -urN barebox-2014.03.0.orig/drivers/mtd/devices/m25p80.c barebox-2014.03.0.work/drivers/mtd/devices/m25p80.c --- barebox-2014.03.0.orig/drivers/mtd/devices/m25p80.c 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/drivers/mtd/devices/m25p80.c 2015-11-29 16:36:16.779351099 +0100 @@ -696,6 +696,7 @@ { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) }, { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) }, { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K) }, + { "sst26vf032b", INFO(0xbf2642, 0, 64 * 1024, 64, SECT_4K) }, /* ST Microelectronics -- newer production may have feature updates */ { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) }, diff -urN barebox-2014.03.0.orig/drivers/usb/imx/chipidea-imx.c barebox-2014.03.0.work/drivers/usb/imx/chipidea-imx.c --- barebox-2014.03.0.orig/drivers/usb/imx/chipidea-imx.c 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/drivers/usb/imx/chipidea-imx.c 2014-06-23 21:44:25.588362664 +0200 @@ -127,6 +127,18 @@ "disable-over-current", NULL)) ci->flags |= MXC_EHCI_DISABLE_OVERCURRENT; + if (of_find_property(ci->dev->device_node, + "pwr-pins-enabled", NULL)) + ci->flags |= MXC_EHCI_POWER_PINS_ENABLED; + + if (of_find_property(ci->dev->device_node, + "pwr-pin-active-high", NULL)) + ci->flags |= MXC_EHCI_PWR_PIN_ACTIVE_HIGH; + + if (of_find_property(ci->dev->device_node, + "oc-pin-active-low", NULL)) + ci->flags |= MXC_EHCI_OC_PIN_ACTIVE_LOW; + return 0; } diff -urN barebox-2014.03.0.orig/drivers/usb/imx/imx-usb-misc.c barebox-2014.03.0.work/drivers/usb/imx/imx-usb-misc.c --- barebox-2014.03.0.orig/drivers/usb/imx/imx-usb-misc.c 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/drivers/usb/imx/imx-usb-misc.c 2014-06-23 21:35:51.463092869 +0200 @@ -31,7 +31,7 @@ #define MX25_H1_SIC_SHIFT 21 #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) #define MX25_H1_PP_BIT (1 << 18) -#define MX25_H1_PM_BIT (1 << 8) +#define MX25_H1_PM_BIT (1 << 16) #define MX25_H1_IPPUE_UP_BIT (1 << 7) #define MX25_H1_IPPUE_DOWN_BIT (1 << 6) #define MX25_H1_TLL_BIT (1 << 5) diff -urN barebox-2014.03.0.orig/drivers/video/imx.c barebox-2014.03.0.work/drivers/video/imx.c --- barebox-2014.03.0.orig/drivers/video/imx.c 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/drivers/video/imx.c 2014-04-13 19:02:08.005011099 +0200 @@ -542,6 +542,10 @@ if (IS_ERR(fbi->ipg_clk)) return PTR_ERR(fbi->ipg_clk); + clk_enable(fbi->ahb_clk); + clk_enable(fbi->ipg_clk); + clk_enable(fbi->per_clk); + fbi->mode = pdata->mode; fbi->regs = dev_request_mem_region(dev, 0); fbi->pcr = pdata->mode->pcr; @@ -559,6 +563,10 @@ info->bits_per_pixel = pdata->mode->bpp; info->fbops = &imxfb_ops; + clk_disable(fbi->per_clk); + clk_disable(fbi->ipg_clk); + clk_disable(fbi->ahb_clk); + dev_info(dev, "i.MX Framebuffer driver\n"); if (pdata->framebuffer) diff -urN barebox-2014.03.0.orig/images/Makefile.imx barebox-2014.03.0.work/images/Makefile.imx --- barebox-2014.03.0.orig/images/Makefile.imx 2014-03-07 07:42:24.000000000 +0100 +++ barebox-2014.03.0.work/images/Makefile.imx 2014-03-22 13:39:39.718623824 +0100 @@ -14,6 +14,10 @@ FILE_barebox-karo-tx25.img = start_imx25_karo_tx25.pblx image-$(CONFIG_MACH_TX25) += barebox-karo-tx25.img +pblx-$(CONFIG_MACH_VMX25) += start_imx25_vmx25 +FILE_barebox-vmx25.img = start_imx25_vmx25.pblx +image-$(CONFIG_MACH_VMX25) += barebox-vmx25.img + # ----------------------- i.MX51 based boards --------------------------- pblx-$(CONFIG_MACH_FREESCALE_MX51_PDK) += start_imx51_babbage CFG_start_imx51_babbage.pblx.imximg = $(board)/freescale-mx51-babbage/flash-header-imx51-babbage.imxcfg