Document:	Custom TFT timing

Copyright (c) 2007, Voipac Technologies a.s.


In file linux-2.6.21-vpac1/arch/arm/mach-pxa/vpac270.c PXA display 
controller timing configuration is based on CONFIG value selected in 
linux-2.6.21-vpac1/drivers/video/Kconfig during kernel configuration.

Pixel clock is derived from 104 MHz host clock by PCD (pixel clock divisor).

Example pixel clock values are:

104 / 2 = 52 MHz		(1024x768)
104 / 3 = 34,6 MHz		(800x600)
104 / 4 = 26 MHz		(640x480)

pixclock = (PCD / 104) * 1000000

Here is custom configuration for 800x600 mode from file
linux-2.6.21-vpac1/arch/arm/mach-pxa/vpac270.c.

/*      SVGA 800x600 16bit, pclk=34.6MHz        */
{
        .pixclock               = 28846,    // = (3 / 104) * 1000000
        .xres                   = 800,
        .yres                   = 600,
        .bpp                    = FB_PXA_BPP,
        .hsync_len              = 8,
        .left_margin            = 128,
        .right_margin           = 48,
        .vsync_len              = 1,
        .upper_margin           = 33,
        .lower_margin           = 1,
        .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
},

For hsync/vsync length and right/left/upper/lower margin calculation 
read pxa 270 developers programmer manual and your TFT display documentation.

To get more verbose debug output during developement you can define 
pr_debug macro in file linux-2.6.21-vpac1/drivers/video/pxafb.c.

#define pr_debug(fmt,arg...) \
        printk(KERN_DEBUG fmt,##arg)